Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsJun Koyama, Yuji Kawasaki
Life of this patent
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Abstract
In a shift register circuit included in a driver circuit for driving an active matrix circuit in an active matrix type display device, a plurality of serial-connected registers constructing register lines are arranged to construct a redundancy shift register circuit. Whether or not each register line has defect is examined by detecting an output of a last register of each register line, then the register line having defect is detected by the examination, a normal register line is selected by a shift register selecting switch, and the serial-connected registers of the selected register line are used in the shift register circuit.
Claims50
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least an invertor circuit,
- wherein said invertor circuit comprises a plurality of pairs of thin film transistors and resistors,
- wherein each of said resistors is interposed between a ground line and a source or drain electrode of each of said thin film transistors, and
- wherein all thin film transistors which constitute said driver circuit are P-channel transistors.
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least an invertor circuit,
- wherein said invertor circuit comprises a plurality of sets of first, second, and third thin film transistors, and
- wherein a gate electrode of said first thin film transistor is connected to an operation clock, a gate electrode of said second thin film transistor is connected to a source or drain electrode of said first thin film transistor, and a gate electrode of said third thin film transistor is connected to a ground line, and
- wherein all thin film transistors which constitute said driver circuit are P-channel transistors.
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least a dynamic circuit,
- wherein said dynamic circuit comprises a plurality of thin film transistors and a plurality of capacitors,
- wherein a first capacitor is connected to a source or drain electrode of a first thin film transistor and a second capacitor is connected to a gate electrode of a second thin film transistor, and
- wherein each of plurality of thin film transistors is a P-channel transistor.
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least a shift register circuit,
- wherein said shift register circuit comprises a plurality of pairs of thin film transistors and resistors,
- wherein each of said resistors is interposed between a ground line and a source or drain electrode of each of said thin film transistors, and
- wherein all thin film transistors which constitute said driver circuit are P-channel transistors.
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least a shift register circuit,
- wherein said shift register circuit comprises a plurality of sets of first, second, and third thin film transistors connected to each other over said substrate,
- wherein a gate electrode of said first thin film transistor is connected to an operation clock, a gate electrode of said second thin film transistor is connected to a source or drain electrode of said first thin film transistor, and a gate electrode of said third thin film transistor is connected to a ground line, and
- wherein all thin film transistors which constitute said driver circuit are P-channel transistors.
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least a dynamic shift register circuit,
- wherein said dynamic circuit comprises a plurality of thin film transistors and a plurality of capacitors,
- wherein a first capacitor is connected to a source or drain electrode of a first thin film transistor and a second capacitor is connected to a gate electrode of a second thin film transistor, and
- wherein each of said plurality of thin film transistors is a P-channel transistor.
A device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least a multiplexer circuit,
- wherein said multiplexer circuit comprises a plurality of pairs of thin film transistors and resistors,
- wherein each of said resistors is interposed between a ground line and a source or drain electrode of each of said thin film transistors, and
- wherein all thin film transistors which constitute said driver circuit are P-channel transistors.
A display device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least an invertor circuit,
- wherein said invertor circuit comprises a plurality of pairs of thin film transistors and resistors,
- wherein each of said resistors is interposed between a ground line and a source or drain electrode of each of said thin film transistors, and
- wherein all thin film transistor which constitute said driver circuit are N-channel transistors.
A display device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least an invertor circuit,
- wherein said invertor circuit comprises a plurality of sets of first, second, and third thin film transistors connected to each other over said substrate,
- wherein a gate electrode of said first thin film transistor is connected to an operation clock, a gate electrode of said second thin film transistor is connected to a source or drain electrode of said first thin film transistor, and a gate electrode of said third thin film transistor is connected to a ground line, and
- wherein all thin film transistors which constitute said driver circuit are N-channel transistors.
A display device comprising a pixel region and a driver circuit formed over a substrate, said driver circuit having at least a dynamic circuit,
- wherein said dynamic circuit comprises a plurality of thin film transistors and a plurality of capacitors,
- wherein a first capacitor is connected to a source or drain electrode of a first in film transistor, and a second capacitor is connected to a gate electrode of a second thin film transistor, and
- wherein each of said plurality of thin film transistors are N-channel transistors.
Dependencies are inferred from the claim text.