PPL arrangement, charge pump, method and mobile transceiver

A method of providing charge regulation for a phase locked loop arrangement, comprising the steps of:

• selectively providing charging current to the phase locked loop arrangement using a current source circuit having a predetermined slew rate;
• and
• selectively depleting charging current from the phase locked loop arrangement using a current sink circuit having a predetermined slew rates and comprising:
• a current mirror comprising a first transistor and a second transistor with a gate of the first transistor coupled to a gate of the second transistor and a source of the first transistor coupled to a gate of the second transistor and the gate of the first transistor coupled to a drain of the first transistor,
• a bias current source coupled to the drain of the first transistor through a switch;
• and
• a leak current sink coupled to the gates of the first and second transistors;
• and
• providing a constant current using a constant current source which in locked mode is offset by current sink pulses of the current sink circuit
• when the switch is closed using the current mirror to mirror a differential between the bias current source and the leak current sink to the second transistor causing the current sink circuit to sink a current and using the bias current source to charge a parasitic capacitance of the current mirror and
• when the switch is open using the leak current sink to discharge the parasitic capacitance of the current mirror.

A mobile transceiver having a phase locked loop with a charge pump, the charge pump comprising:

• a current source circuit having a predetermined slew rate and arranged for selectively providing charging current to the phase locked loop arrangement;
• and
• a current sink circuit having a predetermined slew rate and arranged for selectively depleting charging current from the phase locked loop arrangement;
• and
• a constant current source which in locked mode is offset by current sink pulses of the current sink circuit;
• and wherein the current sink circuit comprises
• a current mirror comprising a first transistor and a second transistor with a gate of the first transistor coupled to a gate of the second transistor and a source of the first transistor coupled to a gate of the second transistor and the late of the first transistor coupled to a drain of the first transistor,
• a bias current source coupled to the drain of the first transistor through a switch;
• and
• a leak current sink coupled to the gates of the first and second transistors;
• whereby when the switch is closed the current mirror is operable to mirror a differential between the bias current source and the leak current sink to the second transistor causing the current sink circuit to sink a current and the bias current source is operable to charge a parasitic capacitance of the current mirror and when the switch is open the leak current sink is operable to discharge the parasitic capacitance of the current mirror.