Field programmable gate array with convertibility to application specific integrated circuit
AssigneeViciciv
InventorRaminda U. Madurawe
Life of this patent
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Abstract
A three-dimensional semiconductor device with two selectable manufacturing configurations includes a first module layer having a plurality of circuit blocks; and a second module layer formed substantially above the first module layer, wherein in a first selectable configuration a plurality of memory circuits are formed to store instructions to control a portion of the circuit blocks, and wherein in a second selectable configuration a predetermined conductive pattern is formed in lieu of the memory circuit to control substantially the same portion of the circuit blocks.
Claims23
A three-dimensional semiconductor device with two selectable manufacturing configurations, comprising:
- a first module layer having a plurality of circuit blocks;
- and
- a second module layer formed substantially above the first module layer, wherein in a first selectable configuration a plurality of memory circuits are formed to store instructions to control a portion of the circuit blocks, and wherein in a second selectable configuration a predetermined conductive pattern is formed in lieu of the memory circuit to control substantially the same portion of the circuit blocks.
A programmable logic device, comprising:
- one or more digital circuits formed on a substrate;
- and
- a non-planar circuit electrically coupled to the digital circuits, the non-planar circuit being either a memory constructed to store data to define the logic outputs of the digital circuits to fabricate a field programmable gate array (FPGA) or a conductive pattern constructed to define the logic outputs of the digital circuits to fabricate an application specific integrated circuit (ASIC), wherein the memory and the conductive pattern options have substantially matching functionality and timing characteristics.
Dependencies are inferred from the claim text.