Programmable data device and method therefor

A method of forming a programmable data device comprising:

• forming a first programmable transistor in series between a power return and a lower output transistor of a first inverter and coupling the first programmable transistor to receive a state of an output of the first inverter;
• forming a second programmable transistor in series between the power return and a lower output transistor of a second inverter and coupling the second programmable transistor to receive a state of an output of the second inverter;
• coupling the second inverter to receive the state of the output of the first inverter;
• and
• forming a third inverter and a fourth inverter coupled as a latch to receive data and coupling an input of the first inverter to receive a state of the latch.

A method of programming a data device of an electrical system comprising:

• latching a data value into a register;
• programming a floating gate transistor to a state in response to the data value;
• and
• coupling current flow through the register to a power return through the floating gate transistor responsive to the state of the floating gate transistor.

A programmable data latch comprising:

• a master latch having an input coupled to receive data and an output,
• a slave latch having an input coupled to receive the master latch and an output, and including a first inverter having an output coupled to an input of a second inverter;
• and
• a first programmable transistor coupled to receive a state of the first inverter and a second programmable transistor coupled to receive a state of the second inverter, the first programmable transistor coupled in series between a power return and a power terminal of the first inverter and the second programmable transistor coupled in series between a power return and a power terminal of the second inverter.