Wafer holder for backside viewing, frontside probing on automated wafer probe stations
AssigneeLSI Logic Corporation
InventorJeff E. Blackwood
Life of this patent
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Abstract
An integrated circuit test apparatus and a method for testing an integrated circuit are described. The integrated circuit test apparatus includes a holder adapted to receive a wafer, where a frontside of the wafer is accessible to be probe tested by electrically conducting probe needles during which a backside of the wafer is accessible to be scanned by an optical scanning mechanism. The scanning mechanism can optically detect photoemission-generated defects resulting from electrical stimuli applied to the integrated circuits via the probe needles. The holder is coupled to a three-dimensional translational mechanism that will allow for automated multi-die test probing.
Claims17
An integrated circuit test apparatus, comprising;
- at least one electrically conductive probe needle;
- an optical scan mechanism arranged above the probe needle;
- a holder adapted to receive a wafer while presenting a backside surface of the wafer upward to the optical scan mechanism and an opposing, frontside surface of the wafer downward to the probe needle;
- and
- a mechanism coupled to the holder for moving the wafer relative to the probe needle.
A method for testing an integrated circuit, comprising:
- contacting a frontside surface of the wafer by a probe needle residing beneath the wafer;
- exposing a backside surface of the wafer to an optical scan mechanism residing above the wafer;
- and
- moving the wafer relative to the probe needle and scan mechanism precisely the width of a die configured on the wafer from the die to each of all neighboring die across the entire wafer in a step-and-repeat fashion during an interim between said contacting and said exposing.
Dependencies are inferred from the claim text.