Method and apparatus for STI using passivation material for trench bottom liner

A silicon-on-insulator semiconductor device, comprising:

• a silicon-on-insulator wafer having a silicon active layer, a dielectric insulation layer, a silicon substrate, and at least one isolation trench defining an active island in the silicon active layer, in which the silicon active layer is formed on the dielectric insulation layer and the dielectric insulation layer is formed on the silicon substrate;
• wherein the at least one isolation trench comprises rounded upper corners, a layer of a passivating insulator in a lower portion of the isolation trench and in contact with the dielectric insulation layer, a sidewall oxide liner, and a dielectric trench isolation material filling the isolation trench, the passivating insulator having a depth sufficient to provide a protective shield or barrier whereby a bird's beak cannot form between the silicon active layer and the dielectric insulation layer.

A silicon-on-insulator semiconductor device, comprising:

• a silicon-on-insulator wafer having a silicon active layer, a dielectric insulation layer, a silicon substrate, and at least one isolation trench defining an active island in the silicon active layer, in which the silicon active layer is formed on the dielectric insulation layer and the dielectric insulation layer is formed on the silicon substrate;
• wherein the at least one isolation trench comprises rounded upper corners, a layer of a passivating insulator in a lower portion of the isolation trench and in contact with the dielectric insulation layer, a sidewall oxide liner, and a dielectric trench isolation material filling the isolation trench, and the device is free of a bird's beak in the lower portion of the isolation trench between the silicon active layer and the dielectric insulation layer adjacent the isolation trench, the passivating insulator having a depth sufficient to provide a protective shield or barrier whereby a bird's beak cannot form between the silicon active layer and the dielectric insulation layer.