Method for forming a bit line for a semiconductor device

A DRAM device comprising a plurality of DRAM cells formed on a semiconductor substrate, each DRAM cell being characterized by a minimum line width, F, and a minimum spacing, S, wherein the area of a single DRAM cell is less than 8F2 comprising:

• active regions in the semiconductor substrate, the active regions being characterized by the minimum width F and a length of at least about 5F, wherein the active regions are arranged in parallel rows and separated from adjacent active regions by the minimum spacing S, and further wherein active regions in adjacent rows are offset from each other in a longitudinal direction;
• word lines, each word line being characterized by the minimum width F, wherein each word line is parallel to, and separated by the minimum spacing S from, adjacent word lines, and further wherein the word lines are perpendicular to the rows of active regions;
• an insulating film formed over the word lines;
• first conductive plugs extending through the insulating film between adjacent word lines and making contact to portions of the active regions between adjacent word lines;
• an interlayer insulating film formed over the first conductive plugs;
• second conductive plugs extending through the interlayer insulating film, the second conductive plugs partially overlapping and contacting the first conductive plugs;
• and bit lines that partially overlap and make contact with the second conductive plugs, the bit lines being characterized by the minimum line width F, wherein adjacent bit lines are parallel and separated by the minimum spacing S, and further wherein the bit lines are oriented in a direction parallel to the rows of active regions.