US 6,746,913 B2 · Method of manufacturing semiconductor integrated circuit device comprising a memory cell and a capacitor

Abstract

A silicon oxide film on which a capacitor of a semiconductor integrated circuit device is formed is formed by the plasma CVD method at a temperature of 450° C. to 700° C. In this semiconductor integrated circuit device, a memory cell formed of a MISFET for data transfer and a capacitor is formed in a memory cell forming area, and an n channel MISFET and a p channel MISFET constituting a logic circuit is formed in a logic circuit forming area. As a result, the amount of degassing from the silicon oxide film can be reduced. Therefore, the growth of silicon grains on a surface of the silicon film constituting a lower electrode of the capacitor is not hindered by the degassing, and it becomes possible to increase the capacitance. Also, the step of a heat treatment for removing the moisture and the like after forming the silicon oxide film can be omitted, and it becomes possible to prevent the deterioration of the property of the MISFET.

Claims10

Dependent claims

A manufacturing method of a semiconductor integrated circuit device comprising a memory cell formed of a MISFET and a capacitor formed on a main surface of a semiconductor substrate, said method comprising the steps of:

(a) forming said MISFET on the main surface of said semiconductor substrate;
(b) forming an insulating film above said MISFET by a high density the plasma CVD method at a temperature of 450° C. to 700° C.;
(c) forming a trench by etching said insulating film;
(d) depositing a silicon film on said insulating film and in said trench, filling said trench by a photoresist, then etching back said silicon film on said insulating film and removing the silicon film from said insulating film to leave the silicon film only on an inner surface of said trench;
e) forming a rugged surface silicon film on said silicon film on said inner surface of said trench to form a lower electrode of said capacitor on the inner wall of the trench;
and
f) forming a dielectric film on said rugged surface silicon film and on said insulating film and forming a plate electrode on said dielectric film.

4 more elements

A manufacturing method of a semiconductor integrated circuit device comprising a memory cell including a MISFET and a capacitor formed on a main surface of a semiconductor substrate, said method comprising the steps of:

(a) forming said MISFET on the main surface of said semiconductor substrate;
(b) depositing a first insulating film above said MISFET at a first temperature;
(c) depositing a second insulating film on said first insulating film at a second temperature between 450° C. and 700° C. that is higher than said first temperature by a high-density plasma CVD method,
(d) forming a trench by etching said first and second insulating films;
(e) depositing a silicon film on said second insulating film and in said trench, filling said trench by a photoresist, then etching back said silicon film on said second insulating film and removing the silicon film on said second insulating film to leave the silicon film only on an inner surface of said trench;
f) forming a rugged surface silicon film an said silicon film on said inner surface of said trench to form a lover electrode of said capacitor on the inner wall of the trench;
and
(g) forming a dielectric film on said rugged surface silicon film and on said second insulating film and forming a plate electrode on said dielectric film.

5 more elements

Dependencies are inferred from the claim text.

Method of manufacturing semiconductor integrated circuit device comprising a memory cell and a capacitor

Life of this patent

Method of manufacturing semiconductor integrated circuit device comprising a memory cell and a capacitor

Life of this patent

Abstract

Claims10