Direct determination of interface traps in MOS devices
AssigneeUnited Microelectronics Corp.
InventorsSteve S. Chung, Shang-Jr Chen, Chien-Kuo Yang, Der-Yuan Wu
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AssigneeUnited Microelectronics Corp.
InventorsSteve S. Chung, Shang-Jr Chen, Chien-Kuo Yang, Der-Yuan Wu
Estimating the term…
A low leakage charge pumping (CP) method has been implemented for direct determination of interface traps in ultra-short gate length MOS devices with ultra-thin gate oxide in the direct tunneling regime. The leakage current in a 12 Å-16 Å gate oxide can be removed from the measured CP current, which enables accurate determination of the interface traps. This method has been demonstrated successfully for variousRTNO grown and RPN treated oxide CMOS devices with very thin gate oxide. It can be used as a good monitor of ultra-thin gate oxide process and the evaluations of device reliabilities in relation to the interface trap generation. In addition, the current method can be used to determine the physical channel length of CMOS devices.
A method for determining interface traps in a semiconductor/oxide interface of a MOS transistor comprising a bulk substrate, a source, a drain, a gate, and a silicon oxide layer beneath the gate, the method comprising:
A method for testing a MOS transistor having an ultra-thin gate oxide layer, wherein the MOS transistor comprises a bulk substrate, a source, a drain, a gate, and an ultra-thin gate oxide layer disposed between the gate and the bulk substrate, the method comprising:
Dependencies are inferred from the claim text.