Differential amplifier slew rate boosting scheme

A slew rate boosted fully differential amplifier comprising:

• an input stage having first and second differential inputs, wherein the input stage is operative to generate first and second differential charging currents in response to an input signal;
• a first high impedance gain node operative to receive the first differential charging current;
• a second high impedance gain node operative to receive the second differential charging current;
• a first compensation capacitor having one plate coupled to the first high impedance gain node and having its opposite plate coupled to the second differential input, wherein substantially none of the first differential charging current is required to charge the first compensation capacitor;
• a second compensation capacitor having one plate coupled to the second high impedance gain node and having its opposite plate coupled to the first differential input, wherein substantially none of the second differential charging current is required to charge the second compensation capacitor;
• a third compensation capacitor having one plate coupled to the first high impedance gain node and having its opposite plate coupled to ground;
• and
• a fourth compensation capacitor having one plate coupled to the second high impedance gain node and having its opposite plate coupled to ground.

A differential amplifier comprising:

• a differential input pair having first and second inputs;
• a first current path from a first branch of the differential input pair for providing a first current;
• a second current path from a second branch of the differential input pair for providing a second current;
• a first compensation capacitor having a first plate coupled to the first current path and a second plate coupled to the second input, such that substantially none of the first current is required to charge the first compensation capacitor;
• a second compensation capacitor having a first plate coupled to the second current path and a second plate coupled to the first input, such that substantially none of the second current is required to charge the second compensation capacitor;
• and
• a first output buffer coupled to the first plate of the first compensation capacitor;
• and
• a second output buffer coupled to the first plate of the second compensation capacitor.