RF power transistor with internal bias feed
AssigneeInfineon Technologies North America Corp.
InventorsLarry Leighton, Prasanth Perugupalli, Nagaraj V. Dixit, Gordon C. Ma
Life of this patent
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Abstract
Conventional broadband RF power amplifiers use a ¼ wavelength transmission line to decouple the gate bias DC source from the gate circuitry and a second ¼ wavelength transmission line to decouple the drain bias DC source from the drain circuitry, taking up considerable printed circuit board space. A novel broadband RF power amplifier uses a transistor with separate terminals for injection of gate bias and drain bias DC sources, eliminating the need for ¼ wavelength transmission lines, thereby freeing up space and allowing higher density packaging. The power amplifier transistor can be implemented with a single die circuit or multiple die circuits operating in parallel.
Claims28
Power transistor comprising:
- a flange;
- a die having a gate, a source, and a drain, wherein the source is electrically coupled to the flange;
- a gate matching circuit located on the flange having an input and an output, the output being coupled to the gate;
- a drain matching circuit located on the flange having an input and an output, the input being coupled with the drain;
- an input terminal being mechanically coupled to the flange and electrically coupled with the input of the gate matching circuit;
- an input bias terminal being mechanically, coupled to the flange and electrically coupled with the gate;
- an output terminal being mechanically coupled to the flange and electrically coupled with the input of the drain matching circuit;
- an output bias terminal being mechanically coupled to the flange and electrically coupled with the drain.
A broadband radio frequency (RF) signal amplifier, comprising:
- at least one transistor attached to a surface of a pedestal, the transistor having a RF input and a RF output, a bias input and a bias output;
- the pedestal comprising a support structure, reference ground and heat sink for the transistor,
- a RF input path electrically connected to the transistor input, an input matching network configured to couple the input signal to the transistor input at an input impedance, and an input direct current (dc) bias network configured to bias the transistor input to an input operating point, and
- a RF output path electrically connected to the transistor output, an output matching network configured to couple the respective component output signal to the transistor output at an output impedance, and an output dc bias networks configured to bias the transistor output to an output operating point.
Dependencies are inferred from the claim text.