Dual write cycle programmable conductor memory system and method of operation
AssigneeMicron Technology, Inc.
InventorsGlen Hush, Kevin G. Duesman, Steve Casper
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Abstract
The present invention provides a method and apparatus for writing a programmable conductor random access memory (PCRAM) element. After a read operation of the memory element a complement logical state from that read is written back to the memory element. In one embodiment the memory element is then again written back to its original state. In another embodiment logic circuitry keeps track of whether the original logic state or its complement are stored in the memory element so that during the next read the stored logic will be correctly read.
Claims42
A memory device comprising,
- a programmable conductor memory element;
- an access circuit for coupling said memory element between an activated word line and an activated bit line during a read operation;
- a sense amplifier coupled to said activated bit line for sensing a first logical state of said memory element;
- and
- writing circuitry for writing said memory element first to a complement logical state of said first logic state in response to said read operation and then writing said memory element back to said first logical state.
A programmable conductor memory circuit comprising:
- a programmable conductor memory element;
- an access device for enabling a read and write access to said memory element;
- and
- a circuit for operating said access device to read a logical value stored in said memory element and then, in response to reading said stored logical value, to write a complementary logic value into said memory element.
A processor based system comprising,
- a processor;
- and
- a memory coupled to said processor, said memory comprising:
- a programmable conductor memory element;
- an access circuit for coupling said memory element between an activated word line and an activated bit line during a read operation;
- a sense amplifier coupled to said activated bit line for sensing a first logical state of said memory element;
- and
- writing circuitry for writing said memory element first to a complement logical state of said first logic state in response to said read operation and then writing said memory element back to said first logical state.
A processor based system comprising,
- a processor;
- and
- a memory coupled to said processor, said memory comprising:
- a programmable conductor memory element;
- an access device for enabling a read and write access to said memory element;
- and
- a circuit for operating said access element to read a logical value stored in said memory device and then, in response to reading said stored logical value, to write a complementary logic value into said memory element.
A method for operating a programmable conductor random access memory element, said method comprising:
- sensing a logical value stored in said memory element;
- writing a logical value which is the complement of the read logical value to said memory element in response to said act of sensing.
A method for writing data to a programmable conductor random access memory element, said method comprising:
- pre-charging a first bit line coupled to the programmable conductor random access memory element to a first voltage value;
- pre-charging a second bit line to a second voltage value, said first value being different from said second value;
- enabling an access transistor to couple the programmable conductor memory element to said first bit line;
- sensing voltage on said first bit line and said second bit line to determine a first logical state of said programmable conductor memory element;
- and
- writing a second logical state complementary to said first logical state to said memory element after said first logical state is determined.
Dependencies are inferred from the claim text.