Data transfer control device and electronic equipment

A data transfer control device for performing data transfer in accordance with the IEEE 1394 standard between a plurality of nodes connected to a bus, the data transfer control device comprising:

• a link circuit that provides a service for packet transfer between the nodes;
• and
• a write circuit that writes a packet, which has been received through the link circuit, to a packet storage memory which is randomly accessible,
• wherein the link circuit performs processing to check a data CRC included within data of the packet received from another node and, performs processing to validate the header of the packet and invalidate the data of the packet when it is determined that there is a CRC error in the data of the packet,
• wherein the packet storage memory is divided into a header area and a data area,
• wherein the write circuit writes the header of the packet to the header area of the packet storage memory and the data of the packet to the data area of the packet storage memory,
• wherein when it is determined that there is the CRC error in data of the packet, the data is invalidated by returning a data pointer indicating a received data position within the data area of the packet storage memory, to a position indicated by the data pointer at a completion of a previous packet reception without returning a header pointer indicating a received header position within the header area of the packet storage memory.

A data transfer control device for performing data transfer in accordance with the IEEE 1394 standard between a plurality of nodes connected to a bus, the data transfer control device comprising:

• a link circuit that provides a service for packet transfer between the nodes;
• a write circuit that writes a packet, which has been received through the link circuit, to a packet storage memory which is randomly accessible;
• and
• a register for setting a first mode, in which a received broadcast packet is invalidated, and a second mode, in which the received broadcast packet is validated,
• wherein the link circuit performs processing to check a destination ID included in a header of the packet received from another node and, performs processing to invalidate the packet when it is determined that the packet is the broadcast packet and the first mode has been set,
• wherein when it is determined that the packet is the broadcast packet and the first mode has been set, the packet is invalidated by not writing the packet to the packet storage memory.