Built-in self-test for multi-channel transceivers without data alignment

A built-in self-testing circuit for testing an integrated circuit having a transceiver, comprising:

• a test pattern generator configured to generate a plurality of test patterns, said plurality of test patterns being associated with a signature;
• a multiplexer having a plurality of inputs and an output, said test pattern generator being coupled to said plurality of inputs, each of said plurality of inputs receiving a corresponding test pattern;
• a demultiplexer having an input and a plurality of outputs, said input of said demultiplexer being coupled to said output of said multiplexer;
• and
• a test result evaluation circuit configured to receive said plurality of outputs of said demultiplexer and identify one or more of said plurality of outputs of said demultiplexer as having one or more errors using said signature.

A method for testing an integrated circuit having a transceiver, said transceiver having a multiplexer coupled to a demultiplexer, said method comprising:

• generating a plurality of test patterns, the plurality of test patterns being associated with a test signature;
• receiving at each of the plurality of inputs of said multiplexer, a corresponding test pattern;
• and
• evaluating each of a plurality of outputs of said demultiplexer using said test signature to identify any error.