System and method for generating cache coherence directory entries and error correction codes in a multiprocessor system

A multiprocessor computer system comprising a plurality of nodes, each respective node including:

• a main memory storing data in a plurality of memory lines, each memory line having a corresponding directory entry and a combined error correction code, the combined error correction code for detecting and correcting errors in both the memory line and the directory entry for the memory line;
• and
• a cache memory system for storing copies of memory lines from the main memories in the plurality of nodes;
• wherein each directory entry in the main memory of each node indicates whether a copy of the corresponding memory line is stored in the cache memory system in another node.

A method for maintaining cache coherence in a multiprocessor computer system, the multiprocessor computer system having a plurality of nodes, comprising:

• storing, in a main memory of a respective node of the plurality of nodes, data in a plurality of memory lines of the main memory;
• wherein each memory line in the main memory of the respective node has a home node comprising the respective node;
• storing, in a directory entry corresponding to each respective memory line of the plurality of memory lines in the main memory of the respective node, directory information indicating nodes, other than the respective node, where copies of the respective memory line are stored in cache memory systems;
• when a copy of the respective memory line is stored in a cache memory system of the respective node, storing, in the cache memory system of the respective node, cache state information indicating whether the copy is an exclusive copy of the respective memory line;
• and
• at the respective node, responding to a transaction request for a particular memory line and its corresponding directory entry, when the cache memory system of the respective node stores a copy of the particular memory line and the cache state information indicates that the copy of the particular memory line is an exclusive copy, by retrieving the copy of the particular memory line from the cache memory system of the respective node and sending the retrieved copy and a predefined null directory entry value.

A method for maintaining cache coherence in a multiprocessor computer system, wherein the multiprocessor computer system includes a plurality of nodes, comprising:

• storing, in a main memory of a respective node of the plurality of nodes, data in a plurality of memory lines of the main memory;
• wherein each memory line in the main memory of the respective node has a home node comprising the respective node;
• storing, in a directory entry corresponding to each respective memory line of the plurality of memory lines in the main memory of the respective node, directory information indicating nodes, other than the respective node, where copies of the respective memory line are stored in cache memory systems;
• storing, for each respective memory line of the plurality of memory line in the main memory of the respective node, a combined error correction code, the combined error correction code for detecting and correcting errors in both the respective memory line and the corresponding directory entry;
• and
• detecting and correcting errors in both a respective memory line and the corresponding directory entry using the combined error correction code for the respective memory line.