Processing ordered data requests to a memory

A computer system, comprising:

• a first execution unit, the first execution unit issuing data requests, the data requests including ordered data requests, the ordered data requests including at least an earlier data request and a later data request, the ordering of the ordered data requests requiring that the earlier data request be completed prior to completion of the later data request;
• a first memory having at least one data request port, the data request port receiving the earlier data request and the later data request, the data request port:
• determining whether the earlier data request corresponds to a miss in the first memory, and
• if the earlier data request corresponds to a miss in the first memory, converting the later data request to a prefetch and reissuing the later data request to the data request port for the first memory.

A data processing system, comprising:

• a first memory;
• and
• a processor, the processor comprising:
• a second memory having a pipelined port, the pipelined port:
• receiving data requests, the data requests including a plurality of ordered data requests, the ordered data requests including at least an earlier ordered data request and a later ordered data request, the ordering of the ordered requests requiring that the earlier ordered data request be completed prior to completion of the later ordered data request,
• determining whether the earlier ordered data request corresponds to a miss in the second memory, and
• if the earlier ordered data request corresponds to a miss in the second memory, converting the later data request to a prefetch and reissuing the later data request, and
• a first execution unit to issue data requests to the pipelined port.

A machine readable medium having stored thereon data representing sequences of instructions that, when executed by a processor, cause the processor to perform operations comprising:

• issuing a plurality of data requests to a data request port for a first memory, the plurality of data requests including a plurality of ordered data requests, the ordering of the ordered data requests directing that an earlier request be completed prior to completion of a later request;
• determining if an earlier one of the ordered data requests corresponds to a miss in the first memory;
• and
• if the earlier one of the ordered data requests corresponds to a miss in the first memory, converting a later one of the ordered data requests to a prefetch and reissuing the later one of the ordered data requests to the first memory.