Hierarchical priority filter with integrated serialization for determining the entry with the highest priority in a buffer memory

A method for determining an entry with the highest priority in a buffer memory, the method comprising:

• operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• selecting the entry associated with the highest priority subgroup;
• and
• serializing the entries by “OR”ing the effective valid bit of each entry with a serialization bit prior to said filter operation and “AND”ing said valid bit with the filter output.

A storage device which is able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the storage device comprising:

• issue filters operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• a first dynamic “OR” type logical stage for selecting the entry with the highest priority;
• and
• a second “OR” stage in each priority subfilter circuit responsive to an auxiliary notation of entries resulting from an unfolding of the entry sequence.

A storage device able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the storage device comprising:

• issue filters operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• and
• a first logic device for “OR”ing an effective valid bit of each entry with a serialization bit prior to said filter operation and a second logic device for “AND”ing said effective valid bit with the filter output.

A sub-unit for use in microprocessor devices having at least one storage apparatus, wherein the storage apparatus comprising a storage device which is able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the sub-unit comprising:

• issue filters for operating a plurality of priority subfilter circuits each of them covering a subgroup of the total of entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• a first dynamic “OR” type logical stage for selecting the entry with the highest priority;
• and
• a second “OR” stage in each priority subfilter circuit responsive to an auxiliary notation of entries resulting from an unfolding of the entry sequence.

A microprocessor device having at least one sub-unit and the sub-unit having at least one storage apparatus, wherein the storage apparatus comprising a storage device which is able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the microprocessor device comprising:

• issue filters for operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• a first dynamic “OR” type logical stage for selecting the entry with the highest priority;
• and
• a second “OR” stage in each priority subfilter circuit responsive to an auxiliary notation of entries resulting from an unfolding of the entry sequence.

A computer system having a microprocessor device, contained within the microprocessor device is at least one sub-unit, associated with the sub-unit is at least one storage apparatus, wherein the storage apparatus comprising a storage device which is able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the computer system comprising:

• issue filters for operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• a first dynamic “OR” type logical stage for selecting the entry with the highest priority;
• and
• a second “OR” stage in each priority subfilter circuit responsive to an auxiliary notation of entries resulting from an unfolding of the entry sequence.

A circulating buffer comprising a storage device which is able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the circulating buffer comprising:

• issue filters for operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• a first dynamic “OR” type logical stage for selecting the entry with the highest priority;
• and
• a second “OR” stage in each priority subfilter circuit responsive to an auxiliary notation of entries resulting from an unfolding of the entry sequence.

An instruction window buffer comprising a storage device which is able to be allocated and deallocated repeatedly during processing program instructions in a computer system, the instruction window buffer comprising:

• issue filters for operating a plurality of priority subfilter circuits each of them covering a subgroup of buffer entries and each selecting the entry with the highest subgroup priority;
• a select block for selecting the entry associated with the highest priority subgroup;
• a first dynamic “OR” type logical stage for selecting the entry with the highest priority;
• and
• a second “OR” staye in each priority subfilter circuit responsive to an auxiliary notation of entries resulting from an unfolding of the entry sequence.