Method and apparatus for automatically generating schedules for wafer processing within a multichamber semiconductor wafer processing tool
AssigneeApplied Materials, Inc.
InventorDusan B. Jevtic
Life of this patent
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Abstract
A method and apparatus for producing schedules for a wafer in a multichamber semiconductor wafer processing tool comprising the steps of providing a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool; initializing a sequence generator with a vertex defining initial wafer positioning within the tool; generating all successor vertices to produce a series of vectors interconnecting the vertices that, when taken together produce a cycle that represents a schedule. All the possible schedules are analyzed to determine a schedule that produces the highest throughput of all the schedules.
Claims22
A method of producing schedules for processing a wafer in a multichamber semiconductor wafer processing tool comprising the steps of:
- (a) providing a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool;
- (b) initializing a sequence generator with an initial digraph vertex defining an initial wafer positioning with the tool;
- and
- (c) generating vectors that represent all valid wafer movements related to the initial digraph vertex that lead to valid successor vertices, where said vectors and vertices, taken together, form a digraph that represents at least one schedule for processing a wafer.
Apparatus for producing schedules for processing a wafer in a multichamber semiconductor wafer processing tool, having a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool, said apparatus comprising:
- a sequence generator, being initialized with an initial value of a vertex defining an initial wafer positioning within the tool, for generating values of said vertex that represent all valid successor wafer positions related to the initial vertex, where said vertices and vectors connecting the vertices, taken together, form at least one cycle that represents a schedule for processing a wafer.
Apparatus for producing schedules for processing a wafer in a multichamber semiconductor wafer processing tool, having a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool, said apparatus comprising:
- (a) means for providing a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool;
- (b) means for initializing a sequence generator with an initial digraph vertex defining an initial wafer positioning with the tool;
- and
- (c) means for generating vectors that represent all valid wafer movements related to the initial digraph vertex that lead to valid successor vertices, where said vectors and vertices, taken together, form a cycle that represents at least one schedule for processing a wafer.
A computer readable memory containing software that, when executed by a processor, causes a sequence generator to perform a method of producing schedules for processing a wafer in a multichamber semiconductor wafer processing tool comprising the steps of:
- (a) providing a trace defining a series of chambers that are visited by a wafer as the wafer is processed by the tool;
- (b) initializing a sequence generator with an initial digraph vertex defining an initial wafer positioning with the tool;
- and
- (c) generating vectors that represent all valid wafer movements related to the initial digraph vertex that lead to valid successor vertices, where said vectors and vertices, taken together, form a digraph that represents at least one schedule for processing a wafer.
Dependencies are inferred from the claim text.