Apparatus and method for simultaneously accessing multiple network switch buffers for storage of data units of data frames
AssigneeAdvanced Micro Devices, Inc.
InventorJinqlih Sang
Life of this patent
Estimating the term…
Abstract
Multiple network switch modules have memory interfaces configured for transferring packet data to respective buffer memories. The memory interfaces are also configured for transfer among each other data units of data frames received from different network switch modules. The memory interfaces transfer the data units according to a prescribed sequence, optimizing memory bandwidth by concurrently executing a prescribed number of successive memory writes or memory reads. An alternative embodiment includes a distributed memory interface in between the network switch modules and a shared memory system, where the width of the data bus of the shared width memory system equals the total number of bits on the data buses of the switch modules.
Claims9
A switching system comprising:
- a plurality of buffer memories, and
- a plurality of multiport switch modules, each having a memory interface configured for outputting a data unit of a corresponding data frame being received, to one of a corresponding one of the buffer memories and another one of the multiport switch modules, the multiport switch modules configured for supplying a group of the data units to the plurality of buffer memories simultaneously during said each memory access cycle according to a prescribed access protocol;
- wherein the memory interfaces transfer the data units to each other via a memory interface link.
A method of storing data frames received by respective network switch modules, the method comprising:
- scheduling in each network switch module a transfer of a data unit of a corresponding data frame being received, to one of a corresponding buffer memory and another one of the network switch modules each memory access cycle;
- and
- simultaneously supplying by the network switch modules the data units to the plurality of buffer memories;
- wherein the scheduling step includes selectively supplying the data unit during said each memory access cycle to a selected one of the network switch modules based on a prescribed protocol.
Dependencies are inferred from the claim text.