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US 6,724,675 B2Granted
Semiconductor memory device and electronic apparatus
AssigneeFujitsu Limited
InventorsAkihiro Funyu, Shinya Fujioka, Hitoshi Ikeda, Takaaki Suzuki, Masao Taguchi, Kimiaki Satoh, Kotoku Sato, Yasurou Matsuzaki
Life of this patent
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Abstract
A semiconductor memory device, such as a DRAM, which needs to be refreshed for retaining data, is provided with a storing portion for storing data therein, and a busy signal outputting portion outputting a busy signal during the refresh operation.
Claims15
A semiconductor memory device, comprising an automatic reading portion which comprises:
- an address counter which generates an address for automatically reading data from said device when automatic reading is externally instructed to perform;
- and
- an access-accepting allowing/rejecting signal receiving portion which receives an access-accepting allowing/rejecting signal output from a data transfer destination and indicating whether or not said destination agrees to accept access,
- wherein said automatic reading portion automatically reads out data from said device when the access-accepting allowing/rejecting signal indicates that said destination agrees to accept access.
1 more element
A semiconductor memory device comprising:
- an automatic writing portion which, when automatic writing is externally instructed to perform, automatically writes data to said device in internally generated addresses;
- and
- an automatic writing indicating signal outputting portion which outputs an automatic writing indicating signal, which indicates that automatic writing is being performed, during the automatic writing operation.
An electronic apparatus comprising:
- a first semiconductor memory device comprising an automatic reading portion which comprises:
- an address counter which generates an address for automatically reading data from said device when automatic reading is externally instructed to perform;
- and
- an access-accepting allowing/rejecting signal receiving portion which receives an access-accepting allowing/rejecting signal output from a destination indicating whether or not said destination allows access,
- wherein said automatic reading portion automatically reads data from said device when the access-accepting allowing/rejecting signal indicates that said destination allows access;
- and
- a second semiconductor memory device comprising:
- an automatic writing portion which, when automatic writing is externally instructed to perform, automatically writing data to said device in internally generated addresses;
- and
- an automatic writing indicating signal outputting portion which outputs an automatic writing indicating signal, which indicates that automatic writing is being performed, during the automatic writing operation.
7 more elements
Dependencies are inferred from the claim text.