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US 6,724,611 B1Granted
Multi-layer chip capacitor
AssigneeIntel Corporation
InventorLarry Eugene Mosley
Life of this patent
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Abstract
An integrated circuit thin film capacitor includes multiple layers of conductors separated by dielectric material. The conductive layers are connected to interconnect lands using conductive vias. The interconnect lands can be controlled collapse chip connection (C4) lands that allow the capacitor to be connected to a circuit board. In one embodiment, the capacitor is mounted on a circuit board in close proximity to a processor circuit. The multi layer capacitor of the present invention provides the ability to increase a capacitance value while lowering interconnect resistance and inductance.
Claims17
A multi layer integrated circuit capacitor comprising:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer;
- a third insulator layer located over the third conductor layer;
- a plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the first, second and third conductive layers;
- and a plurality of controlled collapse chip connection (C4) lands fabricated on and contacting the third insulator layer and in electrical contact with the plurality of conductive vias.
6 more elements
A multi layer integrated circuit capacitor comprising:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer;
- a third insulator layer located over the third conductor layer;
- a plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the first, second and third conductive layers;
- and
- a fourth conductive layer located over the third insulator layer, the fourth conductive layer being patterned to form interconnect lines that selectively connect the plurality of conductive vias.
7 more elements
A multi layer integrated circuit capacitor comprising:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer;
- a third insulator layer located over the third conductor layer;
- and
- a plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the first, second and third conductive layers, wherein the second and third conductive layers are fabricated in a plurality of strips, such that a surface area of the second conductive layer is less than a surface area of the first conductive layer and a surface area of the third conductive layer is less than the surface area of the second conductive layer.
6 more elements
A multi layer integrated circuit capacitor comprising:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer, the second conductive layer being fabricated as a plurality of laterally spaced strips such that a surface area of the second conductive layer is less than a surface area of the first conductive layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer, the third conductive layer being fabricated as a plurality of laterally spaced strips such that a surface area of the third conductive layer is less than the surface area of the second conductive layer;
- a third insulator layer located over the third conductive layer;
- a first plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the third conductive layer;
- a second plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the second conductive layer;
- and
- a third plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the first conductive layer.
8 more elements
A multi layer integrated circuit capacitor comprising:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer;
- a third insulator layer located over the third conductive layer;
- a first plurality of conductive vias downwardly extending through the third insulator layer, the third conductive layer, the second insulator layer, the second conductive layer and the first insulator layer to provide electrical interconnection to the first and third conductive layers;
- and
- a second plurality of conductive vias downwardly extending through the third insulator layer, the third conductive layer, and the second insulator layer to provide electrical interconnection to the second conductive layer.
7 more elements
A circuit board assembly comprising:
- a circuit board having a pair of supply voltage interconnect lines;
- a first integrated circuit die mounted on the circuit board and electrically connected to the supply voltage interconnect lines;
- and
- a second integrated circuit die mounted on the circuit board and electrically connected to the supply voltage interconnect lines, the second integrated circuit die comprising a capacitor having:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer;
- a third insulator layer located over the third conductive layer;
- and
- a plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the first, second and third conductive layers.
10 more elements
A multi layer integrated circuit capacitor comprising:
- a substrate;
- a first conductive layer located over and contacting the substrate;
- a first insulator layer located over and contacting the first conductive layer, the first insulator layer not contacting the substrate;
- a second conductive layer located over the first insulator layer;
- a second insulator layer located over the second conductive layer;
- a third conductive layer located over the second insulator layer;
- a third insulator layer located over the third conductive layer;
- and
- a plurality of conductive vias downwardly extending through the third insulator layer to provide electrical interconnection to the first, second, and third conductive layers, the plurality of conductive vias further extending through the substrate to provide electrical interconnection to both a top surface and a bottom surface of the integrated circuit capacitor.
6 more elements
Dependencies are inferred from the claim text.