Low defect metrology approach on clean track using integrated metrology
AssigneeAdvanced Micro Devices, Inc.
InventorsKhoi A. Phan, Bhanwar Singh, Bharath Rangarajan
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AssigneeAdvanced Micro Devices, Inc.
InventorsKhoi A. Phan, Bhanwar Singh, Bharath Rangarajan
Estimating the term…
One aspect of the present invention relates to a system and method of monitoring for defects on a wafer before and after forming a photoresist layer on the wafer. The system includes a device fabrication system comprising one or more wafer processing system components for producing a device; a defect metrology system integrated within and on track with the fabrication system operative to inspect the wafer for defects before it proceeds to photoresist processing; and a wafer cleaning system for reducing an amount of defects detected on the front and/or back side of the wafer. If the amount of defects have been sufficiently reduced, the front side of the wafer may be coated with a photoresist. Subsequently, the back side of the wafer may be inspected and cleaned while protecting the front side from damage. Cleaning of the wafer may be performed with a thermal shock treatment, for example.
A system for on-track monitoring of defects on a wafer before subjecting the wafer to resist processing comprising:
A method for on-track monitoring of defects on a wafer before subjecting the wafer to resist processing comprising:
An online method for real-time pre-resist coat and post-resist coat inspection of a wafer for defects comprising:
Dependencies are inferred from the claim text.