Liquid crystal display device
AssigneeHitachi, Ltd.
InventorsKeiichirou Ashizawa, Hideki Kuriyama, Takeshi Tanaka, Yuuichi Hashimoto, Mitsuo Nakatani
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Abstract
In a liquid crystal display device having a thin film transistor in a pixel region thereof, the present invention arranges a semiconductor layer being located under a source electrode in the thin film transistor within a contour of a gate line (or a gate electrode of the thin film transistor) so as to suppress a photo conductive current in the semiconductor layer, or to prevent the source electrode from being broken at a position where the source electrode gets over the semiconductor layer.
Claims8
A liquid crystal display device comprising:
- a pair of substrates at least one of which is transparent and between which a liquid crystal layer is interposed;
- a plurality of gate lines and a plurality of drain lines being formed on an inner surface of one of the pair of substrates;
- a thin film transistor being disposed at an intersecting portion of one of the plurality of gate lines and one of the plurality of drain lines;
- a pixel electrode being connected to the thin film transistor;
- a counter electrode being disposed opposite to the pixel electrode;
- wherein each of the gate lines has a dimension in a direction of an extension direction of the drain lines which is substantially constant between adjacent drain lines;
- an edge portion of a semiconductor layer situated under a source electrode of the thin film transistor is arranged within an edge of the gate line situated under the semiconductor;
- and
- the semiconductor layer has a first portion and a second portion, a dimension of the first portion in the extension direction of the drain lines being narrower than a dimension of the second portion in the extension direction of the drain lines.
A liquid crystal display device comprising:
- a pair of substrates at least one of which is transparent and between which a liquid crystal layer is interposed;
- a plurality of pixel regions being disposed in a matrix manner along a first direction and a second direction transverse to the first direction on an inner surface of one of the pair of substrates, each of which has a gate electrode, an insulating layer being formed over the gate electrode, a semiconductor layer being formed on the insulating layer, source and drain electrodes being formed on the semiconductor layer and spaced from one another, and a pixel electrode being connected to one of the source and drain electrodes;
- a plurality of gate signal lines a respective one of which is connected to the gate electrode of each of the pixel regions being arranged along the first direction;
- and
- a plurality of video signal lines a respective one of which is connected to another of the source and drain electrodes of each of the pixel regions being arranged in the second direction,
- wherein each of the gate lines has a dimension in a direction of an extension direction of the video signal lines which is substantially constant between adjacent video signal lines;
- the semiconductor layer is formed within a contour of the gate electrode in each of the pixel regions;
- and
- the semiconductor layer has a first portion and a second portion, a dimension of the first portion in the extension direction of the video signal lines being narrower than a dimension of the second portion in the extension direction of the video signal lines.
Dependencies are inferred from the claim text.