Signal processing apparatus for generating clocks phase-synchronized with input signal
AssigneeCanon Kabushiki Kaisha
InventorYukihiko Sakashita
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Abstract
An image signal processing apparatus has a clock generation circuit for generating a clock which is phase-synchronized with an input image signal, a sampling circuit for sampling the input image signal in response to the clock, a comparator circuit for comparing a plurality of samples output from the sampling circuit with each other, and a control circuit for controlling a phase of the clock by controlling the clock generating circuit in accordance with a comparison result by the compartor circuit.
Claims26
An image signal processing apparatus, comprising:
- clock generating means for generating a clock which is phase-synchronized with an input image signal;
- sampling means for sampling the input image signal in response to the clock;
- selecting means for selecting a sample having a value larger than adjacent samples from a plurality of samples output from said sampling means;
- comparison means for comparing a plurality of selected samples selected by said selecting means with each other;
- and
- control means for detecting a maximum value of the plurality of selected samples in accordance with a comparison result of said comparison means, and for controlling said clock generating means to adjust a phase of the clock in accordance with the detection result of the maximum value.
An image signal processing apparatus, comprising:
- clock generating means for generating a clock which is phase-synchronized with an input image signal;
- sampling means for sampling the input image signal in response to the clock;
- mode switching means for switching a mode of said apparatus among a plurality of modes including a first mode wherein said clock generating means generates a first clock having a first phase and said sampling means samples the input image signal in response to the first clock, and a second mode wherein said clock generating means generates a second clock having a second phase different from the first phase and said sampling means samples the input image signal in response to the second clock;
- selecting means for selecting a sample having a value larger than adjacent samples from a plurality of samples output from said sampling means;
- and
- control means for adjusting a phase of the clock generated by said clock generating means in accordance with (i) a maximum value of the selected samples selected by said selecting means from the plurality of samples obtained in the first mode, and (ii) a maximum value of the selected samples selected by said selecting means from the plurality of samples obtained in the second mode.
An image signal processing apparatus, comprising:
- clock generating means for generating a clock which is phase-synchronized with an input image signal;
- sampling means for sampling the input image signal in response to the clock;
- mode switching means for switching a mode of said apparatus among a plurality of modes wherein said clock generating means generates a plurality of clocks having phases different from each other by a predetermined amount;
- selecting means for selecting a sample having a value larger than adjacent samples from a plurality of samples output from said sampling means;
- and
- control means for detecting, in each of the plurality of modes, a maximum value of the samples selected by said selecting means from the plurality of samples, and for adjusting a phase of the clock generated by said clock generating means in accordance with the maximum values detected in the plurality of modes.
An image signal processing method, comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock;
- selecting a sample having a value larger than adjacent samples from a plurality of samples output in said sampling step;
- comparing a plurality of selected samples selected in said sample selecting step with each other;
- and
- detecting a maximum value of the plurality of selected samples in accordance with a comparison result obtained in said detecting sample comparison steps, and controlling said clock generating step to adjust a phase of the clock in accordance with the detection result of the maximum value.
An image signal processing method comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock;
- switching a mode of said apparatus among a plurality of modes including a first mode wherein said clock generating step generates a first clock having a first phase and said sampling step samples the input image signal in response to the first clock, and a second mode wherein said clock generating step generates a second clock having a second phase different from the first phase and said sampling step samples the input image signal in response to the second clock;
- selecting a sample having a value larger than adjacent samples from a plurality of samples output in said sampling step;
- and
- adjusting a phase of the clock generated in said clock generating step in accordance with (i) a maximum value of the selected samples selected in said selecting step from the plurality of samples obtained in the first mode, and (ii) a maximum value of the selected samples selected in said selecting step from the plurality of samples obtained in the second mode.
A computer readable storage medium storing program codes for realizing an image signal processing method, the program codes comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock;
- selecting a sample having a value larger than adjacent samples from a plurality of samples output in said sampling step;
- comparing a plurality of selected samples selected in said sample selecting step, with each other;
- and
- detecting a maximum value of the plurality of selected samples in accordance with a comparison result obtained in said detecting samples comparison step, and controlling said clock generating step to adjust a phase of the clock in accordance with the detection result of the maximum value.
A computer readable storage medium storing program codes for realizing an image signal processing method, the program codes comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock;
- switching a mode of said apparatus among a plurality of modes including a first mode wherein said clock generating step generates a first clock having a first phase and said sampling step samples the input image signal in response to the first clock, and a second mode wherein said clock generating step generates a second clock having a second phase different from the first phase and said sampling step samples the input image signal in response to the second clock;
- selecting a sample having a value larger than adjacent samples from a plurality of samples output in said sampling step;
- and
- adjusting a phase of the clock generated in said clock generating step in accordance with (i) a maximum value of the selected samples selected in said selecting step from the plurality of samples obtained in the first mode and (ii) a maximum value of the selected samples selected in said selecting step from the plurality of samples obtained in the second mode.
Dependencies are inferred from the claim text.