Test structures for on-chip real-time reliability testing

A method for indicating end-of-lifetime in an integrated circuit comprising:

• predicting hot carrier injection failure wherein said predicting hot carrier injection failure is accomplished by measuring the frequency of a ring oscillator being degraded by hot carrier injection wherein said frequency of said ring oscillator is measured by counting pulses from said ring oscillator over a fixed interval and indicating failure when said frequency drops below a given threshold;
• predicting gate oxide TDDB failure wherein said predicting gate oxide TDDB failure is accomplished by measuring the resistance of a plurality of capacitors being exercised by a stress voltage, wherein said resistance of said plurality of capacitors is determined by application of a sense voltage in series with a large resistor to said plurality of capacitors and measuring the voltage across said plurality of capacitors, and by indicating failure when said resistance of said plurality of capacitors drops below a given threshold;
• predicting electromigration failure wherein said predicting electromigration failure is accomplished by measuring the resistance of a plurality of parallel connected, minimum width, metal lines being exercised by a stress voltage wherein said resistance of said plurality of parallel connected, minimum width, metal lines is determined by application of a sense voltage in series with a small resistor to said plurality of parallel connected, minimum width, metal lines and measuring the voltage across said plurality of parallel connected, minimum width, metal lines and by indicating failure when said resistance of said plurality of parallel connected, minimum width, metal lines rises above a given threshold;
• and
• indicating when either of said hot carrier injection failure, said gate oxide TDDB failure, or said electromigration failure occurs.