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US 6,724,212 B2Granted
Method for testing a semiconductor integrated circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsChizuru Inoshita, Kazuo Aoki
Life of this patent
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Abstract
In a method of testing a semiconductor integrated circuit, an input signal is applied to the semiconductor integrated circuit. Current passing through the elements of the semiconductor integrated circuit is repeatedly measured while sequentially changing the logical state of the elements. The standard deviation of the currents measured is calculated and a semiconductor integrated circuit is determined to be defective if the standard deviation exceeds a threshold value.
Claims2
A method of testing a semiconductor integrated circuit comprising:
- supplying an input signal to a logic circuit of a semiconductor integrated circuit;
- repeatedly measuring a current from a static-time power source passing through a plurality of elements that constitute the semiconductor integrated circuit while sequentially changing and setting a logical state of the plurality of elements;
- calculating a standard deviation of the plurality of currents that have been measured;
- and
- determining that the semiconductor integrated circuit is defective when the standard deviation exceeds a first threshold value.
2 more elements
Dependencies are inferred from the claim text.