Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device comprising:

• forming a plurality of integrated devices in a cell array region and forming a non-earthen conductive pattern over a non-cell region of a substrate;
• forming an etching mask pattern that exposes an exposed region over the cell array region and wholly covers the non-cell region;
• and
• implementing an ion-assisted plasma etching to etch the exposed region by the etching mask pattern.

A method for manufacturing a semiconductor device comprising:

• forming a conductive layer over a cell array region, in which integrated devices are formed, and over a non-cell region, which functions to assist a proper formation of the cell array region;
• forming a photoresist pattern over the conductive layer;
• etching the conductive layer using the photoresist pattern as a mask to form a conductive pattern over the cell array region and to wholly remove the conductive layer formed over the non-cell region;
• and
• implementing an ion-assisted plasma etching,
• wherein the non-cell region includes an alignment mark for properly aligning a mask and the cell array region during a photolithographic process, or a lot ID for recognition of a wafer that functions as the alignment mark,
• wherein the conductive pattern is selected from the group consisting of a bit line, a pad electrode, and a gate electrode, and
• wherein the ion-assisted plasma etching is reactive ion etching (RIE) or magnetic enhanced reactive ion etching (MERIE).