Method for forming bonding pad structures in semiconductor devices
AssigneeSeiko Epson Corporation
InventorsKazuki Matsumoto, Yukio Morozumi, Michio Asahina
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Abstract
Certain embodiments of the present invention relate to a semiconductor device that has a pad section having an excellent coherency with an interlayer dielectric layer, and a method for manufacturing the same. A semiconductor device 1000 has a pad layer 30A formed over an interlayer dielectric layer 20. The pad section 30A includes a wetting layer 32 and a metal wiring layer 37. The metal wiring layer 37 includes an alloy layer 34 that contacts the wetting layer 32. The alloy layer 34 is formed from a material composing the wetting layer 32 and a material composing the metal wiring layer 37.
Claims9
A method for manufacturing a semiconductor device, comprising the steps of:
- (a) forming an interlayer dielectric layer over a substrate;
- (b) forming a wetting layer over and in direct contact with the interlayer dielectric layer;
- (c) forming at least a portion of a metal wiring layer over the wetting layer at a temperature of at least 350° C., and forming an alloy layer including a material comprising the wetting layer and a material comprising the metal wiring layer, wherein the alloy layer is formed between and in direct contact with both the wetting layer and the metal wiring layer, wherein the alloy layer is formed to have a thickness that is two to three times greater than that of the wetting layer;
- and
- (d) forming a bonding pad section by patterning a portion of the wetting layer and the metal wiring layer.
A method for manufacturing a semiconductor device, comprising:
- forming an interlayer dielectric layer over a substrate;
- depositing a wetting layer material over and in direct contact with the interlayer dielectric layer;
- depositing a metal layer including a first layer comprising aluminum and a second layer comprising aluminum, the first layer comprising aluminum being deposited at a temperature of no greater than 200° C., the second layer comprising aluminum being deposited directly on the first layer comprising aluminum, the second layer comprising aluminum being deposited at a temperature of no less than 350° C., and forming an alloy layer including a portion of the wetting layer material and a portion of the metal layer, wherein the alloy layer is formed to have a thickness that is two to three times greater than that of the wetting layer;
- and
- patterning the wetting layer, the alloy layer, and the at metal layer to form in the same step a wiring region and a bonding pad region spaced a distance away from the wiring region.
Dependencies are inferred from the claim text.