Semiconductor memory device, memory system and electronic instrument
AssigneeSeiko Epson Corporation
InventorYasuhiko Tomohiro
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Abstract
A semiconductor memory device has a plurality of memory block areas, a first power source line and a second power source line for supplying the same potential as the first power source line. At least one of the memory block areas is connected to the first power source line, and at least one of the other memory block areas is connected to the second power source line. For example, when the semiconductor memory device includes four memory block areas, one of two memory block areas simultaneously selected is connected to the first power source line, and the other is connected to the second power source line. Further, one of the other two memory block areas simultaneously selected is connected to the first power source line and the other is connected to the second power source line.
Claims18
A semiconductor memory device comprising:
- a plurality of memory block areas;
- a first power source line;
- and
- a second power source line electrically separated from the first power source line, the second power source line supplying a potential of which level is equal to the first power source line,
- wherein the memory block areas include two memory block areas which are simultaneously selected,
- wherein the first power source line is connected to one of the two memory block areas, and
- wherein the second power source line is connected to the other of the two memory block areas.
Dependencies are inferred from the claim text.