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US 6,721,230 B2Granted
Integrated memory with memory cells in a plurality of memory cell blocks, and method of operating such a memory
AssigneeInfineon Technologies AG
InventorPeter Weitz
Life of this patent
Estimating the term…
Abstract
An integrated memory including memory cells in a plurality of memory cell blocks, each memory cell block being assigned at least one dedicated data line and a register circuit that can be written from outside the memory. At the start of a test operation, data is stored in the register circuits as reference data. During an access cycle, in each case in each of the memory cell blocks, a respective memory cell or a group of memory cells is selected, a respective read amplifier is activated and, in each of the register circuits, a comparison between the data read out and the reference data is carried out. As a result, the time required for the test operation of the memory is made comparatively low.
Claims12
An integrated memory, comprising:
- memory cells disposed in at least first and second memory cell blocks;
- read amplifiers;
- data lines respectively connected to said read amplifiers;
- writable register circuits to be written from outside the memory;
- each of said memory cells respectively read out through one of said read amplifiers and one of said data lines connected to said one read amplifier;
- at least a dedicated one of said data lines being associated with each of said memory cell blocks for reading data from said memory cell blocks;
- at least a dedicated one of said register circuits being associated with each of said memory cell blocks;
- said register circuits adapted to store data and to compare the stored data with data applied to a respective one of said register circuits;
- and
- said dedicated one of said register circuits associated with a given one of said memory cell blocks being connected to said dedicated one of said data lines associated with said given memory cell block, said dedicated one of said register circuits adapted to compare data read out of said given memory cell block with the data stored in said dedicated one of said register circuits.
7 more elements
A method of operating an integrated memory, which comprises:
- organizing memory cells into at least first and second memory cell blocks;
- respectively connecting data lines to read amplifiers;
- respectively reading out each of the memory cells through one of the read amplifiers and one of the data lines connected thereto;
- dedicating at least one of the data lines with each of the memory cell blocks for reading data therefrom;
- dedicating at least one writable register circuit to be written from outside the memory with each of the memory cell blocks, the register circuits adapted to store data and to compare the stored data with data applied to a respective one of the register circuits;
- connecting a dedicated one of the register circuits associated with a given one of the memory cell blocks to the dedicated data line associated with the given memory cell block, the dedicated one register circuit adapted to compare data read out of the given memory cell block with the data stored in the dedicated one register circuit;
- carrying out a memory cell access in an access cycle to read an item of data stored in a memory cell;
- at a start of a test operation section, storing data in the register circuits of the respective memory cell blocks as reference data;
- and
- during an access cycle:
- in each of the memory cell blocks, selecting at least one of a respective memory cell and a group of memory cells and activating a respective read amplifier to read data to be read out;
- and
- respectively carrying out a comparison between the data read out and the reference data in each of the register circuits.
10 more elements
A method of operating an integrated memory, which comprises:
- organizing memory cells into at least first and second memory cell blocks;
- respectively connecting data lines to read amplifiers;
- respectively reading out each of the memory cells through one of the read amplifiers and one of the data lines connected thereto;
- dedicating at least one of the data lines with each of the memory cell blocks for reading data therefrom;
- dedicating at least one writable register circuit to be written from outside the memory with each of the memory cell blocks, the register circuits adapted to store data and to compare the stored data with data applied to a respective one of the register circuits;
- connecting a dedicated one of the register circuits associated with a given one of the memory cell blocks to the dedicated data line associated with the given memory cell block, the dedicated one register circuit adapted to compare data read out of the given memory cell block with the data stored in the dedicated one register circuit;
- carrying out a memory cell access in an access cycle to read an item of data stored in a memory cell;
- at a start of a test operation section, storing data in the register circuits of the respective memory cell blocks as reference data;
- and
- during an access cycle:
- in each of the memory cell blocks, selecting at least one memory cell and activating a respective read amplifier to read out data;
- and
- respectively carrying out a comparison between the data read out and the reference data in each of the register circuits.
10 more elements
Dependencies are inferred from the claim text.