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US 6,721,203 B1Granted
Designs of reference cells for magnetic tunnel junction (MTJ) MRAM
AssigneeWestern Digital (Fremont), LLC
InventorsQiuqun Qi, Xizeng Shi, Matthew R. Gibbons
Life of this patent
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Abstract
A reference cell circuit for a magnetic tunnel junction MRAM includes a first magnetic tunnel junction device set to a low resistance state and a second magnetic tunnel junction device set to a high resistance state. A reference cell series unit includes the first magnetic tunnel junction device electrically coupled in series with the second magnetic tunnel junction device. The reference cell series unit further has a first end and a second end with the first end being electrically coupled to a first current source and the second end being electrically coupled to a current sink and a second current source.
Claims41
A reference cell circuit for a magnetic tunnel junction MRAM, comprising:
- a reference cell series unit including;
- a first end and a second end;
- a first magnetic tunnel junction device set to a low resistance state;
- and
- a second magnetic tunnel junction device set to a high resistance state, the first and second magnetic tunnel junction devices being electrically coupled in a series circuit and electrically coupled between the first and second ends;
- a first current source electrically coupled to the first end;
- a second current source electrically coupled to the second end;
- and
- a current sink electrically coupled to the second end.
6 more elements
A reference cell circuit for a magnetic tunnel junction MRAM comprising:
- a first end and a second end;
- a first series electrical circuit, including
- a first magnetic tunnel junction device set to a low resistance state, and a second magnetic tunnel junction device set to a high resistance state and electrically coupled to the first magnetic tunnel junction device in series;
- and
- a second series electrical circuit electrically coupled in parallel to the first series electrical circuit and electrically coupled between the first and second ends, including
- a third magnetic tunnel junction device set to a low resistance state, and a fourth magnetic tunnel junction device set to a high resistance state and electrically coupled to the third magnetic tunnel junction device in series.
3 more elements
A reference cell circuit for a magnetic tunnel junction MRAM comprising:
- a reference cell series unit including;
- a first end and a second end electrically coupled to a first parallel electrical circuit and a second parallel electrical circuit;
- the first parallel electrical circuit, including
- a first magnetic tunnel junction device set to a low resistance state, and a second magnetic tunnel junction device set to a low resistance state and electrically coupled to the first magnetic tunnel junction device in parallel;
- and
- the second parallel electrical circuit electrically coupled in a series electrical circuit with the first parallel electrical circuit, including
- a third magnetic tunnel junction device set to a high resistance state, and a fourth magnetic tunnel junction device set to a high resistance state and electrically coupled to the third magnetic tunnel junction device in parallel.
4 more elements
A method for reading a magnetic tunnel junction MRAM cell comprising:
- obtaining a first signal from a memory cell,
- obtaining a second signal from a reference cell, the reference cell including;
- a first end and a second end;
- a first magnetic tunnel junction device set to a low resistance state;
- and
- a second magnetic tunnel junction device set to a high resistance state, the first and second magnetic tunnel junctions being electrically coupled in a series circuit and electrically coupled between the first and second ends;
- a first current source electrically coupled to the first end;
- a second current source electrically coupled to the second end;
- and
- a current sink electrically coupled to the second end;
- comparing the first signal from the memory cell with the second signal from the reference cell;
- and
- determining a logic state of the memory cell based on the comparison step between the first signal and the second signal.
10 more elements
A method for reading a magnetic tunnel junction MRAM cell comprising:
- obtaining a first signal from a memory cell,
- obtaining a second signal from a reference cell, the reference cell including
- a first end and a second end;
- a first series electrical circuit, including
- a first magnetic tunnel junction device set to a low resistance state, and a second magnetic tunnel junction device set to a high resistance state and electrically coupled to the first magnetic tunnel junction device in series;
- and
- a second series electrical circuit electrically coupled in parallel to the first series electrical circuit and electrically coupled between the first and second ends, including
- a third magnetic tunnel junction device set to a low resistance state, and a fourth magnetic tunnel junction device set to a high resistance state and electrically coupled to the third magnetic tunnel junction device in series;
- comparing the first signal from the memory cell with the second signal from the reference cell;
- and
- determining a logic state of the memory cell based on the comparison step between the first signal and the second signal.
8 more elements
A method for reading a magnetic tunnel junction MRAM cell comprising:
- obtaining a first signal from a memory cell,
- obtaining a second signal from a reference cell, the reference cell including
- a first end and a second end electrically coupled to a first parallel electrical circuit and a second parallel electrical circuit;
- the first parallel electrical circuit, including
- a first magnetic tunnel junction device set to a low resistance state, and a second magnetic tunnel junction device set to a low resistance state and electrically coupled to the first magnetic tunnel junction device in parallel;
- and
- the second parallel electrical circuit electrically coupled in a series electrical circuit with the first parallel electrical circuit, including
- a third magnetic tunnel junction device set to a high resistance state, and a fourth magnetic tunnel junction device set to a high resistance state and electrically coupled to the third magnetic tunnel junction device in parallel;
- comparing the first signal from the memory cell with the second signal from the reference cell;
- and
- determining a logic state of the memory cell based on the comparison step between the first signal and the second signal.
8 more elements
A method for reading a magnetic tunnel junction MRAM cell comprising:
- obtaining a first signal from a memory cell in a first-half of a circuit;
- obtaining a reference signal from a reference cell in a second-half of a circuit;
- comparing the first signal from the memory cell with the reference signal from the reference cell;
- and
- determining a logic state of the memory cell based on the comparison step between the first signal and the reference signal.
2 more elements
A memory block cell layout comprising:
- a plurality of rows, each row including
- a left-half having
- a plurality of left-half memory cells and a left-half reference cell, and
- a right-half having
- a plurality of right-half memory cells and a right-half reference cell;
- and
- a comparator configured to receive from any one row either
- a left-half memory cell signal from one of the plurality of left-half memory cells, and
- a right-half reference cell signal from the right-half reference cell, or
- a right-half memory cell signal from one of the plurality of right-half memory cells, and
- a left-half reference cell signal from the left-half reference cell.
8 more elements
A reference cell circuit for a magnetic tunnel junction MRAM comprising:
- n-strings of magnetic tunnel junction devices, each of the n-strings including
- a first plurality of an integral number of about n 2
- magnetic tunnel junction devices electrically coupled in series with each other, the first plurality of magnetic tunnel junction devices set to a low resistance state;
- a second plurality of an integral number of about n 2
- magnetic tunnel junction devices electrically coupled in series with each other and with the first plurality of magnetic tunnel junction devices, the second plurality of magnetic tunnel junction devices set to a high resistance state;
- and
- the n-strings of magnetic tunnel junction devices coupled in parallel with each other such that a summed resistance across the reference cell circuit is about R + Δ R 2
- ohms.
5 more elements
A reference cell circuit for a magnetic tunnel junction MRAM comprising:
- a first parallel electrical circuit, the first parallel circuit including n-strings of magnetic tunnel junction devices, each of the n-strings having
- a first plurality of an integral number of about n 2
- magnetic tunnel junction devices electrically coupled in series with each other, the first plurality of magnetic tunnel junction devices each set to a low resistance state;
- a second parallel electrical circuit, the second parallel circuit including n-strings of magnetic tunnel junction devices, each of the n-strings having
- a second plurality of an integral number of about n 2
- magnetic tunnel junction devices electrically coupled in series with each other, the second plurality of magnetic tunnel junction devices each set to a high resistance state;
- and
- the first and second parallel electrical circuits being electrically coupled in series with each other such that a summed resistance across the reference cell circuit is about R + Δ R 2
- ohms.
6 more elements
A reference cell circuit for a magnetic tunnel junction MRAM comprising:
- a means for electrically coupling a plurality of magnetic tunnel junction devices so as to produce a series resistance across the plurality of magnetic tunnel junction devices of about R + Δ R 2
- ohms.
A memory device comprising:
- a memory circuit including
- a memory current source configured to supply a memory current to a memory magnetic tunnel junction device;
- a reference circuit including
- a reference cell unit having
- a first end and a second end;
- a first magnetic tunnel junction device set to a low resistance state, and
- a second magnetic tunnel junction set to a high resistance state, the first and second magnetic tunnel junction devices being electrically coupled in a series circuit and electrically coupled between the first and second ends;
- a comparator configured to receive
- a memory signal from the memory circuit;
- and
- a reference signal from the reference circuit,
- to determine a logical state of the memory magnetic tunnel junction device.
9 more elements
Dependencies are inferred from the claim text.