Read/write system with reduced write-to-read transition recovery time independent from input voltage and input current offset

A read/write system having a read mode and a write mode for use with a magnetic storage medium, the read/write system comprising:

• first and second input signal nodes for connection to a magnetoresistive head;
• a differential pair circuit ac coupled to the first and second input signal nodes, the differential pair circuit having first and second transistors;
• a switching circuit for switching the read/write system between the read and write modes;
• and
• an input voltage offset compensation circuit coupled to the differential pair the input voltage offset compensation circuit including a feedback selector for selectively connecting the differential pair circuit in first and second feedback modes in response to transitions between the read and write modes.

A read/write system for reading information from a magnetic storage medium using a magnetoresistive head and for providing an output signal representative of the information read, the read/write system comprising:

• first and second input signal nodes for connection to the magnetoresistive head;
• first and second transistors, each having a base, a collector, and an emitter, wherein the emitter of the first transistor is connected to the emitter of the second transistor;
• first and second capacitors, wherein the first capacitor is connected between the first input signal node and the base of the first transistor, and the second capacitor is connected between the second input signal node and the base of the second transistor;
• first and second resistors, wherein the first resistor is coupled between a first potential and the collector of the first transistor, and the second resistor is coupled between the first potential and the collector of the second transistor;
• a current generator for directing current through the first and second transistors;
• and
• an input voltage offset compensation circuit coupled between the base and the collector of the first and second transistors, the input voltage offset compensation circuit comprising:
• a switch network having first and second input nodes, first and second output nodes, and first and second control signal nodes, wherein the first and second input nodes are connected respectively to the collectors of the first and second transistors;
• and
• a first Gm stage having first and second input nodes and first and second output nodes, wherein the first and second input nodes are connected respectively to the first and second output nodes of the switch network, and the first and second output nodes are connected respectively to the bases of the first and second transistors.

A read system for reading information from a magnetic storage medium using a magnetoresistive head and for providing an output signal representative of the information read, the read system comprising:

• first and second input signal nodes for connection to the magnetoresistive head;
• a differential pair circuit ac coupled to the first and second input signal nodes, the differential pair circuit having first and second transistors;
• and
• an input current offset compensation circuit coupled to the differential pair circuit for selectively adjusting a current to one of the first and second transistors, wherein the input current offset compensation circuit comprises:
• an integrator circuit having first and second input nodes and an output node, wherein the first and second input nodes are coupled to the differential pair circuit;
• and
• first and second biasing resistors, wherein the first biasing resistor is connected between a reference potential and the differential pair circuit, and the second biasing resistor is connected between the output of the integrator circuit and the differential pair circuit.

A read system for reading information from a magnetic storage medium using a magnetoresistive head and for providing an output signal representative of the information read, the read system comprising:

• first and second input signal nodes for connection to the magnetoresistive head;
• first and second transistors, each having a base, a collector, and an emitter, wherein the emitter of the first transistor is connected to the emitter of the second transistor;
• first and second input capacitors, wherein the first input capacitor is connected between the first input signal node and the base of the first transistor, and the second input capacitor is connected between the second input signal node and the base of the second transistor;
• first and second resistors, wherein the first resistor is connected between a first potential and the collector of the first transistor, and the second resistor is connected between the first potential and the collector of the second transistor;
• a current generator for directing current through the first and second transistors;
• and
• an input current offset compensation circuit coupled to the first and second transistors for selectively adjusting a current to one of the first and second transistors, wherein the input current offset compensation circuit comprises:
• an integrator circuit having first and second input nodes and an output node, wherein the first and second input nodes are connected respectively to the first and third load resistors;
• and
• first and second biasing resistors, wherein the first biasing resistor is connected between a reference potential and the base of the first transistor, and the second biasing resistor is connected between the output node of the integrator circuit and the base of the second transistor.

A read/write system for reading information from a magnetic storage medium using a magnetoresistive head and for providing an output signal representative of the information read, the read/write system comprising:

• first and second input signal nodes for connection to the magnetoresistive head;
• a differential pair circuit ac coupled to the first and second input signal nodes, the differential pair circuit having first and second transistors;
• an input voltage offset compensation circuit coupled to the differential pair circuit, the input voltage offset compensation circuit including a feedback selector for selectively connecting the differential pair circuit in a first feedback mode during a write-to-read transition time and a second feedback mode during the remainder of the time;
• and
• an input current offset compensation circuit coupled to the differential pair circuit for selectively adjusting a current to one of the first and second transistors.

A read/write system for reading information from a magnetic storage medium, the read/write system comprising:

• a magnetoresistive head for writing information to the magnetic storage medium and reading information from the magnetic storage medium;
• read/write circuitry coupled to the magnetoresistive head for providing an output signal representative of the information read;
• and
• offset compensation circuitry coupled to the read/write circuitry for compensating both input voltage offset and input current offset in the read/write circuitry while increasing input impedance of the read/write circuitry.