System and method for converting from single-ended to differential signals

A method for converting a single-ended signal to differential signals, the method comprising:

• converting a single-ended input current to a voltage;
• creating a differential voltage from the voltage;
• inputting the differential voltage into a differential pair, the differential pair including a first transistor and a second transistor;
• amplifying the single-ended input current by a gain more than two without use of a differential amplifier, wherein the gain is set by a relative size of a third transistor to each of the first transistor and the second transistor of the differential pair.

A system for converting a single-ended signal to differential signals, comprising:

• a first device to convert an input current of a single-ended input signal to a voltage;
• a second device coupled to the first device to generate a first output current of a double-ended output signal based on the voltage;
• a third device coupled to the first device to generate a second complementary output current of the double-ended output signal based on the voltage;
• and
• a fourth device coupled to the third device, wherein the fourth device balances the current gain of the first device and causes the current through the second device and the third device to be equal.

A system for converting a single-ended signal to differential signals, comprising:

• a first transistor having a first gate, a first drain, and a first source, wherein the first gate and the first drain are connected to a single-ended input current;
• a second transistor having a second gate, a second drain and a second source, wherein the second gate is connected to the first gate, the second drain outputs a first output current of a double-ended output signal, and the second source is connected to the first source;
• a third transistor having a third gate, a third drain and a third source, wherein the third drain outputs a second output current of double-ended output signal, and the third source is connected to the first source;
• and
• a fourth transistor having a fourth gate, a fourth drain and a fourth source, wherein the fourth gate is connected to the third gate, and the fourth source is connected to the first source.