Output load resistor biased LVDS output driver

An LVDS driver circuit that is arranged to drive a load resistance, comprising:

• a first transistor, wherein the first transistor includes a first drain that is coupled to a first power node, a first gate that is coupled to a first signal node for receiving a first signal and a first source that is coupled to a first output node;
• a second transistor, wherein the second transistor includes a second drain that is coupled to the first power node, a second gate that is coupled to a first inverse signal node for receiving a second signal that is complementary to the first signal and a second source that is coupled to a second output node, wherein the load resistance is coupled between the first and second output nodes;
• a third transistor, wherein the third transistor includes a third drain that is coupled to the first output node, a third gate that is coupled to a second inverse signal node for receiving a third signal, and a third source that is coupled to a first common node;
• a fourth transistor, wherein the fourth transistor includes a fourth drain that is coupled to the second output node, a fourth gate that is coupled to a second signal node for receiving a fourth signal that is complementary to the third signal, and a fourth source that is coupled to the first common node;
• a common-mode feedback circuit, wherein the common-mode feedback circuit includes a first input that is coupled to the first output node, a second input that is coupled to the second output node, a third input that is coupled to a common-mode reference node, and an output that is coupled to a first control node;
• and
• a voltage controlled resistor circuit, wherein the voltage controlled resistor circuit is coupled between the first common node and a second power node, and wherein the voltage controlled resistor circuit includes a control input that is coupled to the first control node.

An apparatus that is arranged to drive a load resistance, comprising:

• a driver means, wherein the driver means is arranged to drive an output current to the load resistance in response to drive signals such that an output signal is provided across the load;
• a pre-driver means that is arranged to provide drive signals in response to an input signal;
• a local supply means that is arranged to provide a local reference voltage supply to the pre-driver means, wherein the local reference voltage supply has a voltage that is related to a high output voltage level, wherein the high output voltage level is associated with the output signal;
• a current sense means, wherein the current sense means is configured to sense the output current and provide a sense signal;
• a first scaled current means, wherein the first scaled current means is arranged to provide a first scaled current to the local supply means in response to the sense signal such that the first scaled current is scaled relative to the output current;
• and
• a second scaled current means, wherein the second scaled current means is arranged to provide a second scaled current to the pre-driver means in response to the sense signal such that the second scaled current is scaled relative to the output current.