Semiconductor device with a staggered pad arrangement
AssigneeRenesas Technology Corp.
InventorsKazuyoshi Shimizu, Akira Oizumi, Yasufumi Mori, Akira Mukai
Life of this patent
Estimating the term…
Loading patent…
AssigneeRenesas Technology Corp.
InventorsKazuyoshi Shimizu, Akira Oizumi, Yasufumi Mori, Akira Mukai
Estimating the term…
A semiconductor device includes a plurality of internal row pads and external row pads, consisting of a pad and a pad-control portion that controls an input signal from and an output signal to the pad. The pad and the pad-control portion of the internal row pad are disposed in relationship of reversed arrangement with the pad and the pad-control portion of the external row pad. A plurality of the internal row pads in which the pad and the pad-control portion are disposed in the bonding direction and a plurality of the external row pads in which the pad and the pad-control portion are disposed in the bonding direction are each alternately disposed adjacent perpendicularly to the bonding direction.
A semiconductor device comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.