Semiconductor device comprising a gate conductive layer with a stress mitigating film thereon

Abstract

A semiconductor device having a structure in which the amount of stress on a semiconductor substrate or a gate wire is low, even in a case when the sidewalls of the gate wire are formed of a nitride film is obtained. A gate conductive layer positioned above a silicon substrate, a stress mitigating film that covers a sidewall of the gate conductive layer and a sidewall external layer spacer that covers the stress mitigating film and that exposes the upper edge of the stress mitigating film and the side edge of the bottom portion of the stress mitigating film are provided and the stress mitigating film has silicon oxide films positioned in the areas ranging inwardly from the upper edge and from the side edge so as to sandwich the silicon oxide film from both ends.

Dependencies are inferred from the claim text.