# US 6,720,597 B2 · Cladding of a conductive interconnect for programming a MRAM device using multiple magnetic layers

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- Number: US 6,720,597 B2
- Document ID: US6720597B2
- Status: Granted
- Kind: B2
- Application number: 10/010,363
- Filed: 2001-11-13
- Published: 2003-05-15
- Granted: 2004-04-13
- Earliest claimed: 2001-11-13
- Assignees: Motorola, Inc.
- Inventors: Jason Allen Janesky; Nicholas D. Rizzo; Bradley N. Engel
- Web page: https://patentgrep.com/patent/US6720597B2

## CPC

- G11C 11/1655: {Bit-line or column circuits}
- H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- G11C 11/16: using elements in which the storage effect is based on magnetic spin effect
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A cladded conductive interconnect for programming a magnetoresistive memory device which includes a conductive material with a length, a first barrier conductive material positioned on the conductive material, and a multi-layer cladding region positioned along the length of the conductive material wherein the multi-layer cladding region includes N ferromagnetic layers, where N is a whole number greater than or equal to two, and wherein the multi-layer cladding region further includes at least one spacer layer, wherein the spacer layer can include a metal, an insulator, or an exchange interaction material, and wherein the spacer layer is sandwiched therebetween each adjacent ferromagnetic layer.

## Claims

### Claim 1

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device comprising:
a conductive material with a length; and
a multi-layer cladding region with a length positioned along the length of the conductive material wherein the multi-layer cladding region includes N ferromagnetic layers, where N is a whole number greater than or equal to two, and wherein the multi-layer cladding region further includes at least one spacer layer and wherein the spacer layer is sandwiched therebetween each adjacent ferromagnetic layer.

### Claim 2 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein the multi-layer cladding region is sandwiched therebetween a first barrier conductive material and a second barrier conductive material.

### Claim 3 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein the conductive material includes one of copper, silver, gold, platinum, and another suitable conductive material.

### Claim 4 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein at least one spacer layer includes one of silicon oxide, silicon nitride, aluminum oxide, and another suitable insulator material.

### Claim 5 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein at least one spacer layer includes one of Ru, Re, Os, Ti, Cr, Rh, Pt, Cu, Pd, alloys thereof, and another anti-ferromagnetic material.

### Claim 6 (depends on 5)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 5 wherein at least one spacer layer has a thickness between 4 Å and 30 Å.

### Claim 7 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein at least one spacer layer includes one of Ta, Cu, Al, combinations thereof, and another suitable conductive material.

### Claim 8 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein at least one of the N ferromagnetic layers includes one of Ni, Fe, Mn, Co, combinations thereof, and another suitable ferromagnetic material.

### Claim 9 (depends on 1)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 1 wherein the length of multi-layer cladding region is discontinuous along the length of the conductive material and positioned on the conductive material in the region proximate to the magnetoresistive random access memory device.

### Claim 10

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device comprising:
a metal interconnect with a length; and
a multi-layer cladding region with a length positioned along the length of the metal interconnect wherein the multi-layer cladding region includes a synthetic anti-ferromagnetic layer material which includes N anti-ferromagnetically coupled ferromagnetic layers, where N is a whole number greater than or equal to two, and wherein the multi-layer cladding region further includes at least one spacer layer and wherein the spacer layer is sandwiched therebetween each adjacent ferromagnetic layer.

### Claim 11 (depends on 10)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 10 wherein the multi-layer cladding region is sandwiched therebetween a first barrier conductive material and a second barrier conductive material.

### Claim 12 (depends on 10)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 10 wherein at least one spacer layer includes one of Ru, Re, Os, Ti, Cr, Rh, Pt, Cu, Pd, combinations thereof, and another suitable anti-ferromagnetic material.

### Claim 13 (depends on 12)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 12 wherein at least one spacer layer has a thickness between 4 Å and 30 Å.

### Claim 14 (depends on 10)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 10 wherein at least one of the N ferromagnetic layers includes one of Ni, Fe, Mn, Co, combinations thereof, and another suitable ferromagnetic material.

### Claim 15 (depends on 10)

A multi-layer ferromagnetic cladded conductive interconnect for programming a magnetoresistive memory device as claimed in claim 10 wherein the length of the multi-layer cladding region is discontinuous along the length of the metal interconnect and positioned on the metal interconnect in the region proximate to the magnetoresistive random access memory device.