Customized span compensation of SOI pressure sensor
AssigneeHoneywell International Inc.
InventorRussell L. Johnson
Life of this patent
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Abstract
A sensor chip has a piezo-resistive bridge, a first resistor network that can be used for biasing when connected to an external amplifier, a second resistor network that can be used to set gain when connected to the external amplifier, and a leadout resistor that connects an output of the bridge to a common summing point of the two resistor networks. The summing point is connected to the non-inverting input of the external amplifier. The leadout resistor has a predetermined number of squares. A portion of the squares has a light implant and the remaining portion of the squares has a heavy implant. The ratio of the heavy and light implant portions provides customized span compensation of the amplified output for specific operating temperature ranges.
Claims41
A sensor chip having first, second, third, fourth, fifth, and sixth sensor nodes, the sensor chip comprising:
- a piezo-resistive bridge having first and second input nodes and first and second output nodes;
- a first conductive path connecting the first input node to the first sensor node;
- a second conductive path connecting the second input node to the second sensor node;
- a third conductive path connecting the first output node to the third sensor node;
- a fourth conductive path connecting the second output node to the fourth sensor node, wherein the fourth conductive path includes a leadout resistance, wherein a portion of the leadout resistance is formed as a light implant resistance, and wherein the remainder of the leadout resistance is formed as a heavy implant resistance;
- a fifth conductive path connecting the fourth sensor node to the fifth sensor node, wherein the fifth conductive path includes a bias resistance;
- and,
- a sixth conductive path connecting the fourth sensor node to the sixth sensor node, wherein the sixth conductive path includes a feedback resistance.
A sensing system comprising:
- a resistive sensor bridge having first and second input nodes and first and second output nodes;
- an amplifier having negative and positive inputs and an output;
- a first conductive path connecting the first input node to a first source;
- a second conductive path connecting the second input node to a reference potential;
- a third conductive path connecting the first output node to the positive input of the amplifier;
- a fourth conductive path connecting the second output node to the negative input of the amplifier, wherein the fourth conductive path includes a leadout resistance, wherein a portion of the leadout resistance is formed as a light implant resistance, and wherein the remainder of the leadout resistance is formed as a heavy implant resistance;
- a fifth conductive path connecting a second source to the negative input of the amplifier, wherein the fifth conductive path includes a bias resistance;
- and,
- a sixth conductive path connecting the output of the amplifier to the negative input of the amplifier, wherein the sixth conductive path includes a feedback resistance.
A method of fabricating a sensor chip comprising:
- forming a resistive sensor having at least a first resistance and a second resistance, wherein the resistive bridge has first and second input nodes and at least one output node;
- forming a first conductive path connected to the first input node;
- forming a second conductive path connected to the second input node;
- and,
- forming a third conductive path connected to the output node, wherein the third conductive path comprises a third and fourth resistances, wherein each of the first, second, and third resistances is a heavy implant resistance, and wherein the fourth resistance is a light implant resistance.
Dependencies are inferred from the claim text.