Multi-phase voltage controlled oscillator (VCO) with common mode control

A voltage-controlled oscillator, comprising:

• a plurality of cascaded voltage-controlled oscillator cells, each voltage-controlled oscillator cell having at least one output, each voltage-controlled oscillator cell further comprising:
• a first pair of coupled transistors;
• a bias transistor coupled to the first pair of coupled transistors;
• at least one voltage-controlled capacitor coupled to a control voltage and to the first pair of coupled transistors;
• a second pair of coupled transistors, the second pair of coupled transistors further coupled to the first pair of coupled transistors;
• and
• a common mode feedback circuit that simultaneously receives signals from each voltage controlled oscillator cell.

A method for reducing jitter in a voltage-controlled oscillator having a plurality of voltage-controlled oscillator cells, each voltage-controlled oscillator cell having a plurality of output voltage waveforms, the method comprising:

• combining each of the output voltage waveforms to produce a combined waveform;
• deriving a common mode feedback waveform from the combined waveform and from a reference waveform;
• and
• transmitting the common mode feedback waveform to each of the plurality of voltage-controlled oscillator cells.

A voltage-controlled oscillator having a plurality of voltage-controlled oscillator cells, each voltage-controlled oscillator cell having a plurality of output voltage waveforms, comprising:

• combining means for combining each of the output voltage waveforms to produce a combined voltage;
• deriving means for deriving a common mode feedback voltage from the combined voltage and a reference voltage;
• and
• transmitting means for transmitting the common mode feedback voltage to each of the plurality of voltage-controlled oscillator cells.

A wireless communications device, comprising:

• a voltage-controlled oscillator having a plurality, of cascaded voltage-controlled oscillator cells, each voltage-controlled oscillator cell having at least one output, each voltage-controlled oscillator cell further comprising:
• a first pair of coupled transistors;
• a bias transistor coupled to the first pair of coupled transistors;
• at least one voltage-controlled capacitor coupled to a control voltage and the first pair of coupled transistors;
• a second pair of coupled transistors, the second pair of coupled transistors further coupled to the first pair of coupled transistors;
• and
• a common mode feedback circuit that simultaneously receives signals from each voltage controlled oscillator cell.

A high-speed serial data link semiconductor chip, comprising:

• a voltage-controlled oscillator having a plurality of cascaded voltage-controlled oscillator cells, each voltage-controlled oscillator cell having at least one output, each voltage-controlled oscillator cell further comprising:
• a first pair of coupled transistors;
• a bias transistor coupled to the first pair of coupled transistors;
• at least one voltage-controlled capacitor coupled to a control voltage and the first pair of coupled transistors;
• a second pair of coupled transistors, the second pair of coupled transistors further coupled to the first pair of coupled transistors;
• and
• a common mode feedback circuit that simultaneously receives signals from each voltage controlled oscillator cell.