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US 6,717,429 B2Granted
IC having comparator inputs connected to core circuitry and output pad
AssigneeTexas Instruments Incorporated
InventorLee D. Whetsel
Life of this patent
Estimating the term…
Abstract
As IC circuit density increases, the testing of ICs becomes more complex and costly for the IC manufacturers. A test system and method achieves cost reduction in testing by permitting simultaneous testing of a plurality of semiconductor die. The testing can occur while the die are on a wafer or after the die have been packaged.
Claims8
An integrated circuit comprising:
- A. input pads;
- B. output pads;
- C. core circuitry coupled between the input pads and the output pads;
- D. output circuitry coupled between the core circuitry and the output pads, for each output pad the output circuitry including:
- i. a tri-state buffer having a core input lead connected to a core output lead of the core circuitry, a data output lead connected to an output pad and an enable input lead carrying an enable signal that can place the data output of the tri-state buffer in a high impedance state;
- and
- ii. comparator circuitry having a core input lead connected to the core output lead and the core input lead of the tri-state buffer, an encoded response input lead connected to the output pad and the data output lead of the tri-state buffer, and an enable input lead connected to the enable input lead of the tri-state buffer.
4 more elements
Dependencies are inferred from the claim text.