Memory data verify operation

A system for correcting errors detected in a memory device, the system comprising:

• a memory sub-system comprising:
• a plurality of memory cartridges configured to store data words;
• and
• a device configured to initiate an internal READ command to the plurality of memory cartridges in response to an event;
• and
• a host controller operably coupled to the memory sub-system and comprising:
• an arbiter configured to schedule accesses to the memory sub-system;
• error detection logic configured to detect errors in a data word which has been read from the plurality of memory cartridges;
• a memory engine configured to correct the errors detected in the data word which has been read from the plurality of memory cartridges in response to the internal READ command initiated by the device and configured to produce a corrected data word corresponding to the data word in which an error has been detected;
• scrubbing control logic configured to request a write-back to each memory location in which the error detection logic has detected an error in a data word which has been read from the memory sub-system;
• and
• one or more memory buffers configured to store the corrected data word.

A method for correcting errors detected in a memory sub-system comprising the acts of:

• (a) initiating an internal READ command from a device in the memory sub-system in response to an event, the internal READ command comprising an address corresponding to a specific location in a memory sub-system;
• (b) transmitting a first set of data, corresponding to the address issued in the internal READ command, from the memory sub-system to a host controller;
• (c) detecting errors in the first set of data;
• (d) correcting the errors detected in the first set of data;
• (e) producing a second set of data from the first set of data, wherein the second set of data comprises corrected data and corresponds to the address in the first set of data;
• (f) storing the second set of data and corresponding address in a temporary storage device;
• (g) scheduling a scrub of the address corresponding to the second set of data;
• and
• (h) writing the second set of data to the corresponding address location to replace the first set of data in the memory sub-system.

A system for detecting errors in a memory device, the system comprising:

• a memory sub-system comprising:
• a plurality of memory cartridges configured to store data words;
• and
• a device configured to initiate an internal READ command to the plurality of memory cartridges in response to an operator instruction;
• and
• a host controller operably coupled to the memory sub-system and comprising error detection logic configured to detect errors in a data word which has been read from the plurality of memory cartridges.

A system for detecting errors in a memory device, the system comprising:

• a memory sub-system comprising:
• a plurality of memory cartridges configured to store data words;
• and
• a device configured to initiate an internal READ command to the plurality of memory cartridges in response to a hot-plug operation;
• and
• a host controller operably coupled to the memory sub-system and comprising error detection logic configured to detect errors in a data word which has been read from the plurality of memory cartridges.

A system for detecting errors in a memory device, the system comprising:

• a memory sub-system comprising:
• a plurality of memory cartridges configured to store data words, wherein each of the plurality of memory cartridges comprises a plurality of Dual Inline Memory Modules (DIMMs);
• and
• a device configured to initiate an internal READ command to the plurality of memory cartridges in response to an event;
• and
• a host controller operably coupled to the memory sub-system and comprising error detection logic configured to detect errors in a data word which has been read from the plurality of memory cartridges.