Apparatus and method for a sorting mode in a direct memory access controller of a digital signal processor
AssigneeTexas Instruments Incorporated
InventorsPatrick J. Smith, Tai H. Nguyen
Life of this patent
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Abstract
In order to sort signal group elements organized in blocks in a time-division multiplex protocol into frames of related elements, an address unit addresses the first element in each of the element blocks, then the second element in each element block, etc until all of the elements of all of the blocks have been addressed. In this manner, the related elements are sorted into frames of elements. The address unit performs this element sorting using a base address, an element index equal to the number of elements in a block, and a frame index equal to {the number of elements times (the number of frames minus one)} minus one as parameters.
Claims15
A digital processing unit comprising:
- a core processing unit;
- at least one serial port;
- at least one memory unit;
- and
- a direct memory access unit controlling the transfer of signal groups between the core processing unit, the serial port, and the memory unit;
- wherein the direct memory access unit includes an addressing unit for sorting signal group from a time-division multiplexed series of signals, wherein the addressing unit generates a plurality of index values and selects one of the index values to be combined with the base address, wherein the addressing unit includes;
- an adder unit for providing next new address;
- a new address storage unit, the new address storage unit having a base address applied thereto;
- an element index storage unit;
- a frame index storage unit;
- a switch unit, the switch unit having a signal group stored in the element index storage unit applied to one terminal thereof, the switch unit having a signal group stored in the frame index storage unit applied to a second terminal thereof, the switch unit selectively applying an index offset value selected from one of the element index storage unit signal group and the frame index storage signal group to a terminal of the adder unit in response to a control signal:
- an index unit responsive to the new address, the index unit generating an index value;
- a math unit responsive to the index offset value and the index value for generating a plurality of possible result index values;
- and
- a selection unit responsive to the plurality of possible result index values and the index offset value, the selection unit applying a selected result index value to the new address storage unit.
A method of sorting the addresses of signal group elements arranged in blocks having a time-division multiplexed protocol into frames of signal group elements, the method comprising:
- generating an address for the first element in each block of elements, of each block in sequence;
- generating an address for the next sequential element in each block of elements in sequence, wherein said generating an address for the next sequential element includes:
- generating a plurality of index values;
- selecting one of the index values;
- and
- combining the one index value with the address for the first element to form a new address;
- and
- when all elements have not been addressed at the end of the generating an address for the next sequential element, repeating the generating an address for the next sequential element in each block of elements in sequence.
An apparatus for addressing signal group elements in a time-division multiplexed block format in the order of frame format, the apparatus comprising:
- a new address storage unit, the new address storage unit storing a new address value, the new address storage unit having a base address applied thereto;
- a frame index storage unit;
- the frame index storage unit storing a frame index value;
- an element index storage unit, the element index storage unit storing an element index value;
- a switch unit subject to a control signal, the switch unit having the element index value applied to a first input terminal, the switch unit having the frame index value applied to a second input terminal;
- the control signal determining an index offset value applied to the output terminal of the switch unit;
- an index unit responsive to the new address value, the index unit generating an index value,
- a math unit responsive to the index offset value and the index value for generating a plurality of possible result index values;
- and,
- a selection unit responsive to the plurality of possible result index values and the index offset value, the selection unit applying a selected result index value to the new address storage unit.
Dependencies are inferred from the claim text.