Programmable controller system and method for resetting programmable controller system
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTamiki Kobayashi
Life of this patent
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Abstract
A CPU unit writes a command for instructing a control CPU specified information for each I/O unit, each I/O unit decodes a command instructed by the CPU unit so as to determine whether or not it is information specified by the control CPU, and holds the corresponding information specified by the control CPU in the I/O unit, the CPU units issue commands for instructing the reset control to all the I/O units, and each I/O unit decodes the command instructing its reset control, and when it has determined that the corresponding command is instructed from the CPU unit of the controlling end, it follows the reset controlling instruction so that the resetting operation of the specific I/O unit on the system specified by the CPU unit is controlled.
Claims9
A reset controlling method of a programmable controller system, which comprises at least one CPU unit which carries out the control of the entire system and a plurality of I/O units that are operated under a control of the CPU unit, wherein the CPU unit writes a command for instructing a control CPU specified information for each I/O unit, each I/O unit decodes a command instructed by the CPU unit so as to determine whether or not it is information specified by the control CPU, and holds the corresponding information specified by the control CPU in the I/O unit, the CPU unit issues commands for instructing the reset control to all the I/O units, and each I/O unit decodes the command instructing its reset control, and when it has determined that the corresponding command is instructed from the CPU unit of the controlling end, it follows the reset controlling instruction so that the resetting operation of the specific I/O unit on the system specified by the CPU unit is controlled, the CPU unit being provided with two kinds of instructions for reset-controlling the control section of the I/O unit and for reset-controlling the output section of the I/O unit, with respect to instructions for issuing a reset to each of the I/O units.
A reset controlling method of a programmable controller system, which comprises at least one CPU unit which carries out the control of the entire system and a plurality of I/O units that are operated under a control of the CPU unit, wherein the CPU unit is provided with two systems of a signal for reset-controlling the control section of the I/O unit and a signal for reset-controlling the output section of the I/O unit as reset signals that are issued to the entire system by the CPU unit, and by utilizing the two signals independently, the resetting of the I/O unit is carried out individually between the control section and the output section.
A programmable controller system, which comprises at least one CPU unit which carries out the control of the entire system and a plurality of I/O units that are operated under a control of the CPU unit, wherein the CPU unit writes a command for instructing a control CPU specified information for each I/O unit, each I/O unit decodes a command instructed by the CPU unit so as to determine whether or not it is information specified by the control CPU, and holds the corresponding information specified by the control CPU in the, I/O unit, the CPU unit issues commands for instructing the reset control to all the I/O units, and each I/O unit decodes the command instructing its reset control, and when it has determined that the corresponding command is instructed from the CPU unit of the controlling end, it follows the reset controlling instruction so that the resetting operation of the specific I/O unit on the system specified by the CPU unit is controlled, the CPU unit being provided with two kinds of instructions for reset controlling the control section of the I/O unit and for reset-controlling the output section of the I/O unit, with respect to instructions for issuing a reset to each of the I/O units.
A programmable controller system, which comprises a single or a plurality of CPU units for carrying out the control of the entire system and a plurality of I/O units that are operated under a control of the CPU units, wherein the CPU unit is provided with an outputting unit that outputs a signal for reset-controlling the control section of the I/O unit as a reset signal to be transmitted to the entire system and an outputting unit that outputs a signal for reset-controlling the output section of the I/O unit so that the resetting operation of the I/O unit is individually carried out between the control section and the output section.
Dependencies are inferred from the claim text.