Host bridge translating non-coherent packets from non-coherent link to coherent packets on conherent link and vice versa
AssigneeAdvanced Micro Devices, Inc.
InventorsJames B. Keller, Derrick R. Meyer
Life of this patent
Estimating the term…
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AssigneeAdvanced Micro Devices, Inc.
InventorsJames B. Keller, Derrick R. Meyer
Estimating the term…
A computer system is presented which implements a system and method for conveying packets between a coherent processing subsystem and a non-coherent input/output (I/O) subsystem. The processing subsystem includes a first processing node coupled to a second processing node via a coherent communication link. The first processing node includes a host bridge which translates packets moving between the processing subsystem and the I/O subsystem. The I/O subsystem includes an I/O node coupled to the first processing node via a non-coherent communication link. The I/O node may embody one or more I/O functions (e.g., modem, sound card, etc.). The coherent and non-coherent communication links are physically identical. For example, the coherent and non-coherent communication links may have the same electrical interface and the same signal definition. The host bridge translates non-coherent packets from the I/O node to coherent packets, and transmits the coherent packets to the second processing node. The host bridge also translates coherent packets from the second processing node to non-coherent packets, and transmits the non-coherent packets to the I/O node. The coherent and non-coherent packets have identically located command fields. The translating process includes copying the contents of the command field of one packet type to the command field of the other packet type.
A computer system, comprising:
A computer system, comprising:
A method for use in a computer system, comprising:
A method for use in a computer system, comprising:
A node comprising a host bridge coupled to receive a non-coherent packet from an I/O node on a non-coherent link to the node on which the node and the I/O node are configured to transmit only non-coherent packets, wherein the host bridge is configured to translate the non-coherent packet to a coherent packet for transmission on a coherent link on which the node is configured to transmit coherent packet, the coherent packets used to maintain consistency of data stored in memory and in one or more caches include in the node, and wherein the coherent and non-coherent packets have a command field located in the same position within the coherent packet and the non-coherent packet, and wherein the host bridge is configured to copy the command field from the non-coherent packet to the coherent packet as a part of translating the non-coherent packet to the coherent packet, and wherein the coherent and non-coherent links are separate and have the same electrical interface and the same signal definition.
A computer system comprising:
Dependencies are inferred from the claim text.