Programmable memory based control for generating optimal timing to access serial flash devices
AssigneeLegerity, Inc.
InventorSuraj Bhaskaran
Life of this patent
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Abstract
In its many aspects and variations, a method for accessing a peripheral memory from a processor is provided. The method comprises first initiating the access. Information is then written from the processor to an operational register in a processor memory to enable the peripheral memory. The processor then processes parallel instructions for a predetermined time during which the access occurs. When the access is over, the processor reads the operational register to disable the peripheral memory. In other aspects, an apparatus programmed to perform this method and a program storage medium encoded with instructions that, when executed by a computer, perform the method are provided.
Claims35
A method for accessing a peripheral memory from a processor, the method comprising:
- initiating the access;
- writing information from the processor to an operational register in a processor memory to enable the peripheral memory;
- processing parallel instructions for a predetermined time during which the access occurs;
- and
- reading the operational register to disable the peripheral memory.
An apparatus, comprising:
- a peripheral including a peripheral memory;
- a computer interfaced with the peripheral, the computer including:
- a processor electrically coupled to the peripheral memory;
- and
- a processor memory electrically coupled to the processor, the processor memory further including
- an operational register;
- and
- storage for a software implemented peripheral driver that, when invoked by the processor, performs the following acts:
- initiating an access to the peripheral memory;
- writing information from the processor to the operational register to enable the peripheral memory;
- processing parallel instructions for a predetermined time during which the access occurs;
- and
- reading the operational register to disable the peripheral memory.
A program storage medium encoded with instructions that, when executed by a processor, perform a method comprising:
- initiating an access to a peripheral memory;
- writing information from a processor to an operational register in a processor memory to enable the peripheral memory;
- processing parallel instructions for a predetermined time during which the access occurs;
- and
- reading the operational register to disable the peripheral memory.
Dependencies are inferred from the claim text.