Image processing device

An image processing device, comprising:

• a Huffman-decoding processing section for Huffman-decoding a compressed image data;
• a memory f or storing the image data which has undergone the Huffman-decoding processing in the Huffman-decoding processing section;
• an inverse quantization processing section for inversively quantizing the Huffman-decoded image data read out from the memory;
• an inverse DCT processing section which performs two-dimensional inverse DCT processing on the image data which has been inversively-quantized in the inverse quantization processing section;
• and
• a decoding control section which outputs a signal (IDCTSTART) for beginning processing of the inverse DCT processing section, a signal (IQSTART) for beginning processing of the inverse quantization processing section, and a signal (IHUFFSTART) for beginning processing of the Huffman-decoding processing section as well as a write control signal for writing the Huffman-decoded image data into the memory and a read control signal for reading the image data from the memory for the inverse quantization processing, wherein
• the memory is a two-port memory which has a writing port and a reading port independent from each other and a capacity which can contain data for one block formed by M×N pixels (where M and N are positive natural numbers, and M≠N−1), and
• in the case where the data for one block is written into the memory according to a zigzag-scan order or a alternate-scan order in response to the write control signal from the encoding control section, and the data for one block is read out from the memory according to a column direction order in response to the read control signal from the decoding control section, a time difference between a time to start writing the data into the memory and a time to start reading the data from the memory is controlled by the write control signal and the read control signal such that all of the data written into the memory can be read out.

An image processing device, comprising:

• a DCT/inverse DCT processing section which is capable of performing both two-dimensional DCT processing on digital image data and two-dimensional inverse DCT processing on compressed image data and which is commonly utilized for the respective processings;
• a quantization/inverse quantization processing section which is capable of performing both quantization processing on the two-dimensional DCT-processed image data and inverse quantization processing on the two-dimensional inversively DCT-processed image data and which is commonly utilized for the respective processings;
• a Huffman-encoding/Huffman-decoding processing section which is capable of performing both Huffman-encoding processing on the quantized image data and Huffman-decoding processing on the inversively-quantized image data and which is commonly utilized for the respective processings;
• a two-port memory which has a writing port and a reading port independent from each other and a capacity which can contain data for one block formed by M×N pixels (where M and N are positive natural numbers, and M≠N−1);
• selector for selecting data to be written into the two-port memory in response to a select signal which triggers encoding/decoding processing;
• and
• an encoding/decoding control section which outputs a processing start signal (DCTSTART or IDCTSTART) for the DCT/inverse DCT processing section, a processing start signal (QSTART or IQSTART) for the quantization/inverse quantization processing section, and a processing start signal (HUFFSTART or IHUFFSTART) for the Huffman-encoding/Huffman-decoding processing section as well as a write control signal and a read control signal to the two-port memory, wherein
• in the case where the select signal triggers encoding processing, the encoding/decoding control section sends a write control signal to the memory in order to write data for one block into the memory according to a column direction order and sends a read control signal to the memory in order to read data for one block from the memory according to a zigzag-scan order or an alternate-scan order:
• in the case where the select signal triggers decoding processing, the encoding/decoding control section sends a write control signal to the memory in order to write data for one block into the memory according to the zigzag-scan order or the alternate-scan order and sends a read control signal to the memory in order to read data for one block from the memory according to the column direction order;
• and
• in both of the encoding processing and the decoding processing, a time difference between a time to start writing the data into the memory and a time to start reading the data from the memory is controlled by the write control signal and the read control signal such that all of the data written into the memory can be read out.