Apparatus and method for controlling the sampling clock in a data transmission system

A method for controlling a sampling clock in a digital data transmission system, which comprises:

• transmitting a synchronization word at regular time intervals;
• controlling a sampling clock at a receiving end of a digital data transmission system by the transmission of the synchronization word;
• filtering a received, sampled, and filtered signal with a clock control criterion filter and, at the same time, subjecting the received, sampled, and filtered signal to a detection method for identification of the synchronization word;
• controlling an adjustment logic device for the sampling clock on identification of the synchronization word with an output value of the clock control criterion filter;
• and
• forming a magnitude of the output value of the clock control criterion filter and subjecting the magnitude to high-pass filtering before supplying the magnitude to the adjustment logic device.

An apparatus for controlling a sampling clock in a digital data transmission system, comprising:

• a clock control criterion filter for filtering a received, sampled, and filtered signal at a receiving end of a digital data transmission system;
• an apparatus for identifying a synchronization word transmitted at regular time intervals at a receiving end of a digital data transmission system;
• an adjustment logic device;
• a switch supplying a clock control criterion to said adjustment logic device for a sampling clock, said apparatus actuating said switch based upon the transmission of the synchronization word;
• a magnitude formation circuit;
• and
• a high-pass filter, wherein said magnitude formation circuit and said high-pass filter are disposed between said clock control criterion filter and said adjustment logic device.

A method for regulating a sampling rate in a data transfer system, which comprises:

• transmitting a synchronizing word used for receiver-side regulation of the sampling rate;
• filtering a received signal with a rate-regulating criterion filter and simultaneously detecting the received signal to recognize the synchronizing word;
• controlling an adjusting logic for the sampling rate once the synchronizing word is recognized with an initial value of the rate-regulating criterion filter;
• forming a rate for the initial value of the rate-regulating criterion filter;
• and
• performing high pass filtering of the rate before the rate is fed to the adjusting logic.