Digital clock recovery
AssigneeLSI Logic Corporation
InventorRégis Lauret
Life of this patent
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AssigneeLSI Logic Corporation
InventorRégis Lauret
Estimating the term…
A clock recovery mechanism for an ATM receiver recovers a service (source) clock transmitted over an ATM network. The mechanism includes an input for receiving an SRTS from the ATM network, a local SRTS generator for locally generating an SRTS, a comparator for comparing a received SRTS and a locally generated SRTS and a recovered service clock generator responsive to an output of the comparator for generating the recovered service clock and for controlling the local SRTS generator. The locally generated SRTS is compared directly with the received SRTS. The local SRTS is generated using the same method as used to generate the transmitted SRTS, that is using the network clock fnx and a locally generated clock, at frequency fs. The difference between the locally generated SRTS and the received SRTS can be expressed directly in a number of fnx pulse clocks to be added or removed to the generated fs clock. Thus a service clock can be recovered at a receiver location using SRTSs by means of a digital technique.
A clock recovery mechanism for an ATM receiver for recovering a service clock transmitted over an ATM network, said mechanism comprising:
A clock recovery method in an ATM receiver for recovering a service clock transmitted over an ATM network, said method comprising the steps of:
A method of circuit emulation over an ATM network comprising, at an ATM transmitter, using a first SRTS generator for generating SRTSs for transmission in response to a CBR service clock and, at an ATM receiver:
Dependencies are inferred from the claim text.