High-speed read-write circuitry for semi-conductor memory devices

A semi-conductor memory device comprising:

• a plurality of data lines;
• a data amplifier coupled to the data lines to pre-charge the data lines and maintain voltage equalization on the data lines while the data amplifier is deactivated, and to amplify data signals on the data lines while the data amplifier is activated;
• and
• a read buffer coupled to the data lines, including an input stage and a regenerative latch, wherein the input stage isolates the regenerative latch from the data lines when the data lines are in a pre-charged state.

A method for reading data from a memory array of a semi-conductor memory device comprising:

• activating a plurality of sense amplifiers coupled to a plurality of memory cells by a corresponding plurality of bit line pairs, whereby the plurality of sense amplifiers start to amplify read data signals on the plurality of bit line pairs;
• then
• activating a subset of a plurality of column switches coupled to the plurality of bit line pairs, wherein the subset of column switches couples a subset of the bit line pairs to a set of data line pairs;
• and then
• activating a set of regenerative data amplifiers coupled to the set of data line pairs to amplify read data signals on the set of data line pairs and the subset of the bit line pairs, wherein the regenerative data amplifiers are enabled before the sense amplifiers fully amplify the read data signals.

A semi-conductor memory device comprising:

• a memory array to store data;
• a write buffer coupled to the memory array to temporarily store write data to be written into the memory array;
• a read buffer coupled to the memory array and to the write buffer to temporarily store read data being read out of the memory array or write data being driven out of the write buffer;
• and
• circuitry coupled to the memory array, the write buffer and the read buffer to read a masked portion of a set of data out from the memory array into the read buffer while writing a non-masked portion of the set of data from the write buffer into the memory array and the read buffer during the same memory array operation.