Block redundancy implementation in heirarchical RAM's
AssigneeBroadcom Corporation
InventorsEsin Terzioglu, Gil I. Winograd, Cyrus Afghahi
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Abstract
The present invention relates to a system and method for providing redundancy in a hierarchically memory, by replacing small blocks in such memory. The present invention provides such redundancy (i.e., replaces such small blocks) by either shifting predecoded lines or using a modified shifting predecoder circuit in the local predecoder block. In one embodiment, the hierarchal memory structure includes at least one active predecoder adapted to be shifted out of use; and at least one redundant predecoder adapted to be shifted in to use.
Claims24
A hierarchal memory structure, comprising:
- at least one active predecoder adapted to be shifted out;
- and
- at least one redundant predecoder electrically coupled to said at least one active precoder adapted to be shifted in.
A hierarchical memory structure comprising:
- a synchronously controlled global element;
- a self-timed local element interfacing with said synchronously controlled global element;
- at least one predecoder electrically coupled to said synchronously controlled global element adapted to fire for current predecoding;
- and
- at least one predecoder electrically coupled to said synchronously controlled global element adapted to fire for previous predecoding.
A predecoder block used with a hierarchical memory structure, comprising:
- a plurality of active predecoders adapted to fire for current predecoding;
- at least one redundant predecoder adapted to fire for previous predecoding;
- a plurality of higher address predecoded lines;
- a plurality of lower address predecoded lines, wherein one higher address predecoded line is coupled to all said lower address predecoded lines;
- and
- at least one shift pointer adapted to shift in said redundant predecoder.
A predecoder block used with a hierarchical memory structure, comprising:
- at least one current predecoder adapted to fire for current address mapping;
- at least one redundant predecoder adapted to fire for previous address mapping;
- and
- shift circuitry adapted to shift said active predecoder out and said redundant predecoder in.
A method of providing redundancy in a memory structure, comprising:
- shifting out a first predecoder block;
- and
- shifting in a second predecoder block.
Dependencies are inferred from the claim text.